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authorDeepak Nibade <dnibade@nvidia.com>2014-07-28 08:47:07 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:10:41 -0400
commita20bb7dde2de191cb18545d6ccd98b30a6faaf84 (patch)
tree21c4b115c3f080ed2b10f277e30734c1dd471595
parent4df9290536dc02250eac2abbf0d4dc5d27f0edcc (diff)
gpu: nvgpu: fix error handling for mutex_acquire()
Currently if pmu_mutex_acquire() fails, we disable ELPG and move ahead. But it is not clear why it is required to disable ELPG in case where we fail to acquire mutex. Hence skip disabling ELPG if mutex_acquire() fails Bug 1533644 Change-Id: I7e8e99a701d0ba071eb31ac17582b04072ee55eb Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/448131 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c48
1 files changed, 12 insertions, 36 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 1f7b78f9..c8cc4373 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -1527,7 +1527,7 @@ int gk20a_fifo_preempt_channel(struct gk20a *g, u32 hw_chid)
1527 u32 delay = GR_IDLE_CHECK_DEFAULT; 1527 u32 delay = GR_IDLE_CHECK_DEFAULT;
1528 u32 ret = 0; 1528 u32 ret = 0;
1529 u32 token = PMU_INVALID_MUTEX_OWNER_ID; 1529 u32 token = PMU_INVALID_MUTEX_OWNER_ID;
1530 u32 elpg_off = 0; 1530 u32 mutex_ret = 0;
1531 u32 i; 1531 u32 i;
1532 1532
1533 gk20a_dbg_fn("%d", hw_chid); 1533 gk20a_dbg_fn("%d", hw_chid);
@@ -1536,10 +1536,7 @@ int gk20a_fifo_preempt_channel(struct gk20a *g, u32 hw_chid)
1536 for (i = 0; i < g->fifo.max_runlists; i++) 1536 for (i = 0; i < g->fifo.max_runlists; i++)
1537 mutex_lock(&f->runlist_info[i].mutex); 1537 mutex_lock(&f->runlist_info[i].mutex);
1538 1538
1539 /* disable elpg if failed to acquire pmu mutex */ 1539 mutex_ret = pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1540 elpg_off = pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1541 if (elpg_off)
1542 gk20a_pmu_disable_elpg(g);
1543 1540
1544 /* issue preempt */ 1541 /* issue preempt */
1545 gk20a_writel(g, fifo_preempt_r(), 1542 gk20a_writel(g, fifo_preempt_r(),
@@ -1571,10 +1568,7 @@ int gk20a_fifo_preempt_channel(struct gk20a *g, u32 hw_chid)
1571 gk20a_fifo_recover_ch(g, hw_chid, true); 1568 gk20a_fifo_recover_ch(g, hw_chid, true);
1572 } 1569 }
1573 1570
1574 /* re-enable elpg or release pmu mutex */ 1571 if (!mutex_ret)
1575 if (elpg_off)
1576 gk20a_pmu_enable_elpg(g);
1577 else
1578 pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token); 1572 pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1579 1573
1580 for (i = 0; i < g->fifo.max_runlists; i++) 1574 for (i = 0; i < g->fifo.max_runlists; i++)
@@ -1587,24 +1581,18 @@ int gk20a_fifo_enable_engine_activity(struct gk20a *g,
1587 struct fifo_engine_info_gk20a *eng_info) 1581 struct fifo_engine_info_gk20a *eng_info)
1588{ 1582{
1589 u32 token = PMU_INVALID_MUTEX_OWNER_ID; 1583 u32 token = PMU_INVALID_MUTEX_OWNER_ID;
1590 u32 elpg_off; 1584 u32 mutex_ret;
1591 u32 enable; 1585 u32 enable;
1592 1586
1593 gk20a_dbg_fn(""); 1587 gk20a_dbg_fn("");
1594 1588
1595 /* disable elpg if failed to acquire pmu mutex */ 1589 mutex_ret = pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1596 elpg_off = pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1597 if (elpg_off)
1598 gk20a_pmu_disable_elpg(g);
1599 1590
1600 enable = gk20a_readl(g, fifo_sched_disable_r()); 1591 enable = gk20a_readl(g, fifo_sched_disable_r());
1601 enable &= ~(fifo_sched_disable_true_v() >> eng_info->runlist_id); 1592 enable &= ~(fifo_sched_disable_true_v() >> eng_info->runlist_id);
1602 gk20a_writel(g, fifo_sched_disable_r(), enable); 1593 gk20a_writel(g, fifo_sched_disable_r(), enable);
1603 1594
1604 /* re-enable elpg or release pmu mutex */ 1595 if (!mutex_ret)
1605 if (elpg_off)
1606 gk20a_pmu_enable_elpg(g);
1607 else
1608 pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token); 1596 pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1609 1597
1610 gk20a_dbg_fn("done"); 1598 gk20a_dbg_fn("done");
@@ -1618,7 +1606,7 @@ int gk20a_fifo_disable_engine_activity(struct gk20a *g,
1618 u32 gr_stat, pbdma_stat, chan_stat, eng_stat, ctx_stat; 1606 u32 gr_stat, pbdma_stat, chan_stat, eng_stat, ctx_stat;
1619 u32 pbdma_chid = ~0, engine_chid = ~0, disable; 1607 u32 pbdma_chid = ~0, engine_chid = ~0, disable;
1620 u32 token = PMU_INVALID_MUTEX_OWNER_ID; 1608 u32 token = PMU_INVALID_MUTEX_OWNER_ID;
1621 u32 elpg_off; 1609 u32 mutex_ret;
1622 u32 err = 0; 1610 u32 err = 0;
1623 1611
1624 gk20a_dbg_fn(""); 1612 gk20a_dbg_fn("");
@@ -1629,10 +1617,7 @@ int gk20a_fifo_disable_engine_activity(struct gk20a *g,
1629 fifo_engine_status_engine_busy_v() && !wait_for_idle) 1617 fifo_engine_status_engine_busy_v() && !wait_for_idle)
1630 return -EBUSY; 1618 return -EBUSY;
1631 1619
1632 /* disable elpg if failed to acquire pmu mutex */ 1620 mutex_ret = pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1633 elpg_off = pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1634 if (elpg_off)
1635 gk20a_pmu_disable_elpg(g);
1636 1621
1637 disable = gk20a_readl(g, fifo_sched_disable_r()); 1622 disable = gk20a_readl(g, fifo_sched_disable_r());
1638 disable = set_field(disable, 1623 disable = set_field(disable,
@@ -1674,10 +1659,7 @@ int gk20a_fifo_disable_engine_activity(struct gk20a *g,
1674 } 1659 }
1675 1660
1676clean_up: 1661clean_up:
1677 /* re-enable elpg or release pmu mutex */ 1662 if (!mutex_ret)
1678 if (elpg_off)
1679 gk20a_pmu_enable_elpg(g);
1680 else
1681 pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token); 1663 pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1682 1664
1683 if (err) { 1665 if (err) {
@@ -1903,25 +1885,19 @@ int gk20a_fifo_update_runlist(struct gk20a *g, u32 runlist_id, u32 hw_chid,
1903 struct fifo_runlist_info_gk20a *runlist = NULL; 1885 struct fifo_runlist_info_gk20a *runlist = NULL;
1904 struct fifo_gk20a *f = &g->fifo; 1886 struct fifo_gk20a *f = &g->fifo;
1905 u32 token = PMU_INVALID_MUTEX_OWNER_ID; 1887 u32 token = PMU_INVALID_MUTEX_OWNER_ID;
1906 u32 elpg_off; 1888 u32 mutex_ret;
1907 u32 ret = 0; 1889 u32 ret = 0;
1908 1890
1909 runlist = &f->runlist_info[runlist_id]; 1891 runlist = &f->runlist_info[runlist_id];
1910 1892
1911 mutex_lock(&runlist->mutex); 1893 mutex_lock(&runlist->mutex);
1912 1894
1913 /* disable elpg if failed to acquire pmu mutex */ 1895 mutex_ret = pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1914 elpg_off = pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1915 if (elpg_off)
1916 gk20a_pmu_disable_elpg(g);
1917 1896
1918 ret = gk20a_fifo_update_runlist_locked(g, runlist_id, hw_chid, add, 1897 ret = gk20a_fifo_update_runlist_locked(g, runlist_id, hw_chid, add,
1919 wait_for_finish); 1898 wait_for_finish);
1920 1899
1921 /* re-enable elpg or release pmu mutex */ 1900 if (!mutex_ret)
1922 if (elpg_off)
1923 gk20a_pmu_enable_elpg(g);
1924 else
1925 pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token); 1901 pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
1926 1902
1927 mutex_unlock(&runlist->mutex); 1903 mutex_unlock(&runlist->mutex);