diff options
author | David Nieto <dmartineznie@nvidia.com> | 2017-10-16 15:24:25 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-20 14:55:38 -0400 |
commit | 8c5ea40ccaad022401e45e61d5b6ff3354ffa413 (patch) | |
tree | b67eb0bf86473cbebeb2fb84302fdd92d262c945 | |
parent | e492eb5bdd8b4e6484291954f57d1b8303e22eb1 (diff) |
gpu: nvgpu: handle smid table init failures
Handle the possibility of failing gr init due to smid table initialization
failures
bug 2004378
Change-Id: I904b918a0ea31c32292edb3ab8ac3b1459c38a28
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1581661
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gr_vgpu.c | 7 |
3 files changed, 19 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 700dcdf8..1b9ecd86 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -1164,8 +1164,12 @@ int gr_gk20a_init_fs_state(struct gk20a *g) | |||
1164 | 1164 | ||
1165 | gk20a_dbg_fn(""); | 1165 | gk20a_dbg_fn(""); |
1166 | 1166 | ||
1167 | if (g->ops.gr.init_sm_id_table) | 1167 | if (g->ops.gr.init_sm_id_table) { |
1168 | g->ops.gr.init_sm_id_table(g); | 1168 | g->ops.gr.init_sm_id_table(g); |
1169 | /* Is table empty ? */ | ||
1170 | if (g->gr.no_of_sm == 0) | ||
1171 | return -EINVAL; | ||
1172 | } | ||
1169 | 1173 | ||
1170 | for (sm_id = 0; sm_id < g->gr.no_of_sm; sm_id++) { | 1174 | for (sm_id = 0; sm_id < g->gr.no_of_sm; sm_id++) { |
1171 | tpc_index = g->gr.sm_to_cluster[sm_id].tpc_index; | 1175 | tpc_index = g->gr.sm_to_cluster[sm_id].tpc_index; |
@@ -1459,7 +1463,9 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g, | |||
1459 | g->ops.gr.commit_global_timeslice(g, c, false); | 1463 | g->ops.gr.commit_global_timeslice(g, c, false); |
1460 | 1464 | ||
1461 | /* floorsweep anything left */ | 1465 | /* floorsweep anything left */ |
1462 | g->ops.gr.init_fs_state(g); | 1466 | err = g->ops.gr.init_fs_state(g); |
1467 | if (err) | ||
1468 | goto clean_up; | ||
1463 | 1469 | ||
1464 | err = gr_gk20a_wait_idle(g, gk20a_get_gr_idle_timeout(g), | 1470 | err = gr_gk20a_wait_idle(g, gk20a_get_gr_idle_timeout(g), |
1465 | GR_IDLE_CHECK_DEFAULT); | 1471 | GR_IDLE_CHECK_DEFAULT); |
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 92096cfa..af834b02 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -658,9 +658,13 @@ int gr_gm20b_load_smid_config(struct gk20a *g) | |||
658 | 658 | ||
659 | int gr_gm20b_init_fs_state(struct gk20a *g) | 659 | int gr_gm20b_init_fs_state(struct gk20a *g) |
660 | { | 660 | { |
661 | int err = 0; | ||
662 | |||
661 | gk20a_dbg_fn(""); | 663 | gk20a_dbg_fn(""); |
662 | 664 | ||
663 | gr_gk20a_init_fs_state(g); | 665 | err = gr_gk20a_init_fs_state(g); |
666 | if (err) | ||
667 | return err; | ||
664 | 668 | ||
665 | g->ops.gr.load_tpc_mask(g); | 669 | g->ops.gr.load_tpc_mask(g); |
666 | 670 | ||
@@ -675,7 +679,7 @@ int gr_gm20b_init_fs_state(struct gk20a *g) | |||
675 | 679 | ||
676 | g->ops.gr.load_smid_config(g); | 680 | g->ops.gr.load_smid_config(g); |
677 | 681 | ||
678 | return 0; | 682 | return err; |
679 | } | 683 | } |
680 | 684 | ||
681 | int gr_gm20b_load_ctxsw_ucode_segments(struct gk20a *g, u64 addr_base, | 685 | int gr_gm20b_load_ctxsw_ucode_segments(struct gk20a *g, u64 addr_base, |
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index b913847b..2d6beda6 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c | |||
@@ -615,6 +615,7 @@ static int vgpu_gr_init_gr_config(struct gk20a *g, struct gr_gk20a *gr) | |||
615 | { | 615 | { |
616 | struct vgpu_priv_data *priv = vgpu_get_priv_data(g); | 616 | struct vgpu_priv_data *priv = vgpu_get_priv_data(g); |
617 | u32 gpc_index; | 617 | u32 gpc_index; |
618 | int err = -ENOMEM; | ||
618 | 619 | ||
619 | gk20a_dbg_fn(""); | 620 | gk20a_dbg_fn(""); |
620 | 621 | ||
@@ -653,7 +654,9 @@ static int vgpu_gr_init_gr_config(struct gk20a *g, struct gr_gk20a *gr) | |||
653 | g->ops.gr.bundle_cb_defaults(g); | 654 | g->ops.gr.bundle_cb_defaults(g); |
654 | g->ops.gr.cb_size_default(g); | 655 | g->ops.gr.cb_size_default(g); |
655 | g->ops.gr.calc_global_ctx_buffer_size(g); | 656 | g->ops.gr.calc_global_ctx_buffer_size(g); |
656 | g->ops.gr.init_fs_state(g); | 657 | err = g->ops.gr.init_fs_state(g); |
658 | if (err) | ||
659 | goto cleanup; | ||
657 | return 0; | 660 | return 0; |
658 | cleanup: | 661 | cleanup: |
659 | nvgpu_err(g, "out of memory"); | 662 | nvgpu_err(g, "out of memory"); |
@@ -664,7 +667,7 @@ cleanup: | |||
664 | nvgpu_kfree(g, gr->gpc_tpc_mask); | 667 | nvgpu_kfree(g, gr->gpc_tpc_mask); |
665 | gr->gpc_tpc_mask = NULL; | 668 | gr->gpc_tpc_mask = NULL; |
666 | 669 | ||
667 | return -ENOMEM; | 670 | return err; |
668 | } | 671 | } |
669 | 672 | ||
670 | int vgpu_gr_bind_ctxsw_zcull(struct gk20a *g, struct gr_gk20a *gr, | 673 | int vgpu_gr_bind_ctxsw_zcull(struct gk20a *g, struct gr_gk20a *gr, |