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authorThomas Fleury <tfleury@nvidia.com>2019-09-27 16:18:19 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2020-01-30 02:42:22 -0500
commit8110cee82842da134d3dfdc2e13406f1f94aa8ed (patch)
treee87b737eddb964a771815878d9da19e1a7ab7ed6
parent9e328ed6b8826f8a1e86bb4584fbb872e91840f3 (diff)
gpu: nvgpu: accessors for FB/HSSMU MMU_DEBUG_CTRL
Add accessors for NV_PFB_HSMMU_PRI_MMU_DEBUG_CTRL and NV_PFB_PRI_MMU_DEBUG_CTRL Bug 2515097 Bug 2713590 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Change-Id: Ieadee041854bc9a17721b5b17938a106e205517f Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208770 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Kajetan Dutka <kdutka@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: Kajetan Dutka <kdutka@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_fb_gv100.h30
1 files changed, 29 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_fb_gv100.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_fb_gv100.h
index 66727b94..ac248b57 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_fb_gv100.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_fb_gv100.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -244,6 +244,26 @@ static inline u32 fb_hsmmu_pri_mmu_ctrl_atomic_capability_mode_power_f(void)
244{ 244{
245 return 0x3000000U; 245 return 0x3000000U;
246} 246}
247static inline u32 fb_hsmmu_pri_mmu_debug_ctrl_r(void)
248{
249 return 0x001facc4U;
250}
251static inline u32 fb_hsmmu_pri_mmu_debug_ctrl_debug_v(u32 r)
252{
253 return (r >> 16U) & 0x1U;
254}
255static inline u32 fb_hsmmu_pri_mmu_debug_ctrl_debug_m(void)
256{
257 return 0x1U << 16U;
258}
259static inline u32 fb_hsmmu_pri_mmu_debug_ctrl_debug_enabled_f(void)
260{
261 return 0x10000U;
262}
263static inline u32 fb_hsmmu_pri_mmu_debug_ctrl_debug_disabled_f(void)
264{
265 return 0x0U;
266}
247static inline u32 fb_hshub_num_active_ltcs_r(void) 267static inline u32 fb_hshub_num_active_ltcs_r(void)
248{ 268{
249 return 0x001fbc20U; 269 return 0x001fbc20U;
@@ -676,10 +696,18 @@ static inline u32 fb_mmu_debug_ctrl_debug_enabled_v(void)
676{ 696{
677 return 0x00000001U; 697 return 0x00000001U;
678} 698}
699static inline u32 fb_mmu_debug_ctrl_debug_enabled_f(void)
700{
701 return 0x10000U;
702}
679static inline u32 fb_mmu_debug_ctrl_debug_disabled_v(void) 703static inline u32 fb_mmu_debug_ctrl_debug_disabled_v(void)
680{ 704{
681 return 0x00000000U; 705 return 0x00000000U;
682} 706}
707static inline u32 fb_mmu_debug_ctrl_debug_disabled_f(void)
708{
709 return 0x0U;
710}
683static inline u32 fb_niso_cfg1_r(void) 711static inline u32 fb_niso_cfg1_r(void)
684{ 712{
685 return 0x00100c14U; 713 return 0x00100c14U;