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authorSeema Khowala <seemaj@nvidia.com>2017-12-01 15:15:36 -0500
committerAlexander Van Brunt <avanbrunt@nvidia.com>2017-12-06 16:04:44 -0500
commit7d65ec92d8eea59ccb02baf63848e21a76b6f304 (patch)
treeb79d289a6ff1e0ffdbea1e0035b0b11bd9f964c5
parent5791b47d81b9135e7944aedd681424b0e1ab6717 (diff)
gpu: nvgpu: gv11b: init alloc_blob_space fn ptr
Use NVGPU_DMA_FORCE_CONTIGUOUS for non-wpr blob alloc. CPU writes some data to non WPR blob (sysmem). ACR binary executing from PMU, first copies that data to DMEM and then copies that data into WPR. Without NVGPU_DMA_FORCE_CONTIGUOUS, secure boot fails due to ACR writing wrong bootloader data to PMU DMEM. Bug 200355756 Change-Id: I18982caff62b2e7cbe64ea98c1bb935496cfe91c Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1610491 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r--drivers/gpu/nvgpu/gv11b/acr_gv11b.c12
-rw-r--r--drivers/gpu/nvgpu/gv11b/acr_gv11b.h2
-rw-r--r--drivers/gpu/nvgpu/gv11b/hal_gv11b.c2
3 files changed, 15 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
index 41695fa6..799b2db4 100644
--- a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
@@ -54,6 +54,18 @@ static void flcn64_set_dma(struct falc_u64 *dma_addr, u64 value)
54 54
55/*Forwards*/ 55/*Forwards*/
56 56
57int gv11b_alloc_blob_space(struct gk20a *g,
58 size_t size, struct nvgpu_mem *mem)
59{
60 int err;
61
62 gv11b_dbg_pmu("alloc blob space: NVGPU_DMA_FORCE_CONTIGUOUS");
63 err = nvgpu_dma_alloc_flags_sys(g, NVGPU_DMA_FORCE_CONTIGUOUS,
64 size, mem);
65
66 return err;
67}
68
57/*Loads ACR bin to FB mem and bootstraps PMU with bootloader code 69/*Loads ACR bin to FB mem and bootstraps PMU with bootloader code
58 * start and end are addresses of ucode blob in non-WPR region*/ 70 * start and end are addresses of ucode blob in non-WPR region*/
59int gv11b_bootstrap_hs_flcn(struct gk20a *g) 71int gv11b_bootstrap_hs_flcn(struct gk20a *g)
diff --git a/drivers/gpu/nvgpu/gv11b/acr_gv11b.h b/drivers/gpu/nvgpu/gv11b/acr_gv11b.h
index 5fbe45e2..004853be 100644
--- a/drivers/gpu/nvgpu/gv11b/acr_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/acr_gv11b.h
@@ -28,4 +28,6 @@ int gv11b_bootstrap_hs_flcn(struct gk20a *g);
28int gv11b_init_pmu_setup_hw1(struct gk20a *g, 28int gv11b_init_pmu_setup_hw1(struct gk20a *g,
29 void *desc, u32 bl_sz); 29 void *desc, u32 bl_sz);
30void gv11b_setup_apertures(struct gk20a *g); 30void gv11b_setup_apertures(struct gk20a *g);
31int gv11b_alloc_blob_space(struct gk20a *g, size_t size,
32 struct nvgpu_mem *mem);
31#endif /*__PMU_GP106_H_*/ 33#endif /*__PMU_GP106_H_*/
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index db24a68e..bdf741d9 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -743,7 +743,7 @@ int gv11b_init_hal(struct gk20a *g)
743 gops->pmu.prepare_ucode = gp106_prepare_ucode_blob, 743 gops->pmu.prepare_ucode = gp106_prepare_ucode_blob,
744 gops->pmu.pmu_setup_hw_and_bootstrap = gv11b_bootstrap_hs_flcn, 744 gops->pmu.pmu_setup_hw_and_bootstrap = gv11b_bootstrap_hs_flcn,
745 gops->pmu.get_wpr = gm20b_wpr_info, 745 gops->pmu.get_wpr = gm20b_wpr_info,
746 gops->pmu.alloc_blob_space = gm20b_alloc_blob_space, 746 gops->pmu.alloc_blob_space = gv11b_alloc_blob_space,
747 gops->pmu.pmu_populate_loader_cfg = 747 gops->pmu.pmu_populate_loader_cfg =
748 gp106_pmu_populate_loader_cfg, 748 gp106_pmu_populate_loader_cfg,
749 gops->pmu.flcn_populate_bl_dmem_desc = 749 gops->pmu.flcn_populate_bl_dmem_desc =