diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2016-06-08 07:52:21 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:17 -0500 |
commit | 7b43eac2bc1e9e5946f1c721686f841af0550aef (patch) | |
tree | 37e5dab40078e0e51d214b62db0ce90cbde1c217 | |
parent | 24a6dee36ea943d9f7b00cbbebcc0798ed0ee0fc (diff) |
gpu: nvgpu: ACR interface update for GP104/GP106
JIRA DNVGPU-34
Change-Id: Ieb8e73451a5d73480b8d9e29e78b1a273b17d796
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1161120
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/acr_t18x.h | 20 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/acr_gp106.h | 121 |
2 files changed, 141 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/acr_t18x.h b/drivers/gpu/nvgpu/acr_t18x.h new file mode 100644 index 00000000..1e48d5ca --- /dev/null +++ b/drivers/gpu/nvgpu/acr_t18x.h | |||
@@ -0,0 +1,20 @@ | |||
1 | /* | ||
2 | * NVIDIA T18x ACR | ||
3 | * | ||
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | */ | ||
15 | #ifndef _NVGPU_ACR_T18X_H_ | ||
16 | #define _NVGPU_ACR_T18X_H_ | ||
17 | |||
18 | #include "gp106/acr_gp106.h" | ||
19 | |||
20 | #endif | ||
diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.h b/drivers/gpu/nvgpu/gp106/acr_gp106.h new file mode 100644 index 00000000..26e68cd7 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/acr_gp106.h | |||
@@ -0,0 +1,121 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #ifndef __ACR_GP106_H_ | ||
15 | #define __ACR_GP106_H_ | ||
16 | |||
17 | #include "gm20b/acr_gm20b.h" | ||
18 | #include "gm206/acr_gm206.h" | ||
19 | |||
20 | struct lsf_ucode_desc_v1 { | ||
21 | u8 prd_keys[2][16]; | ||
22 | u8 dbg_keys[2][16]; | ||
23 | u32 b_prd_present; | ||
24 | u32 b_dbg_present; | ||
25 | u32 falcon_id; | ||
26 | u32 bsupports_versioning; | ||
27 | u32 version; | ||
28 | u32 dep_map_count; | ||
29 | u8 dep_map[LSF_FALCON_ID_END * 2 * 4]; | ||
30 | u8 kdf[16]; | ||
31 | }; | ||
32 | |||
33 | struct lsf_wpr_header_v1 { | ||
34 | u32 falcon_id; | ||
35 | u32 lsb_offset; | ||
36 | u32 bootstrap_owner; | ||
37 | u32 lazy_bootstrap; | ||
38 | u32 bin_version; | ||
39 | u32 status; | ||
40 | }; | ||
41 | |||
42 | struct lsf_lsb_header_v1 { | ||
43 | struct lsf_ucode_desc_v1 signature; | ||
44 | u32 ucode_off; | ||
45 | u32 ucode_size; | ||
46 | u32 data_size; | ||
47 | u32 bl_code_size; | ||
48 | u32 bl_imem_off; | ||
49 | u32 bl_data_off; | ||
50 | u32 bl_data_size; | ||
51 | u32 app_code_off; | ||
52 | u32 app_code_size; | ||
53 | u32 app_data_off; | ||
54 | u32 app_data_size; | ||
55 | u32 flags; | ||
56 | }; | ||
57 | |||
58 | struct flcn_ucode_img_v1 { | ||
59 | u32 *header; /*only some falcons have header*/ | ||
60 | u32 *data; | ||
61 | struct pmu_ucode_desc_v1 *desc; /*only some falcons have descriptor*/ | ||
62 | u32 data_size; | ||
63 | void *fw_ver; /*NV2080_CTRL_GPU_GET_FIRMWARE_VERSION_PARAMS struct*/ | ||
64 | u8 load_entire_os_data; /* load the whole osData section at boot time.*/ | ||
65 | struct lsf_ucode_desc_v1 *lsf_desc; /* NULL if not a light secure falcon.*/ | ||
66 | u8 free_res_allocs;/*True if there a resources to freed by the client.*/ | ||
67 | u32 flcn_inst; | ||
68 | }; | ||
69 | |||
70 | struct lsfm_managed_ucode_img_v2 { | ||
71 | struct lsfm_managed_ucode_img_v2 *next; | ||
72 | struct lsf_wpr_header_v1 wpr_header; | ||
73 | struct lsf_lsb_header_v1 lsb_header; | ||
74 | union flcn_bl_generic_desc_v1 bl_gen_desc; | ||
75 | u32 bl_gen_desc_size; | ||
76 | u32 full_ucode_size; | ||
77 | struct flcn_ucode_img_v1 ucode_img; | ||
78 | }; | ||
79 | struct ls_flcn_mgr_v1 { | ||
80 | u16 managed_flcn_cnt; | ||
81 | u32 wpr_size; | ||
82 | u32 disable_mask; | ||
83 | struct lsfm_managed_ucode_img_v2 *ucode_img_list; | ||
84 | void *wpr_client_req_state;/*PACR_CLIENT_REQUEST_STATE originally*/ | ||
85 | }; | ||
86 | |||
87 | struct flcn_acr_region_prop_v1 { | ||
88 | u32 start_addr; | ||
89 | u32 end_addr; | ||
90 | u32 region_id; | ||
91 | u32 read_mask; | ||
92 | u32 write_mask; | ||
93 | u32 client_mask; | ||
94 | u32 shadowmMem_startaddress; | ||
95 | }; | ||
96 | |||
97 | /*! | ||
98 | * no_regions - Number of regions used. | ||
99 | * region_props - Region properties | ||
100 | */ | ||
101 | struct flcn_acr_regions_v1 { | ||
102 | u32 no_regions; | ||
103 | struct flcn_acr_region_prop_v1 region_props[T210_FLCN_ACR_MAX_REGIONS]; | ||
104 | }; | ||
105 | |||
106 | struct flcn_acr_desc_v1 { | ||
107 | union { | ||
108 | u32 reserved_dmem[(LSF_BOOTSTRAP_OWNER_RESERVED_DMEM_SIZE/4)]; | ||
109 | } ucode_reserved_space; | ||
110 | u32 signatures[4]; | ||
111 | /*Always 1st*/ | ||
112 | u32 wpr_region_id; | ||
113 | u32 wpr_offset; | ||
114 | u32 mmu_mem_range; | ||
115 | struct flcn_acr_regions_v1 regions; | ||
116 | u32 nonwpr_ucode_blob_size; | ||
117 | u64 nonwpr_ucode_blob_start; | ||
118 | u32 dummy[4]; //ACR_BSI_VPR_DESC | ||
119 | }; | ||
120 | |||
121 | #endif /*__PMU_GP106_H_*/ | ||