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authorAparna Das <aparnad@nvidia.com>2017-11-29 19:39:32 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-12-01 19:29:38 -0500
commit7ae3c070da0c8adc52a606129c8c5c37191add30 (patch)
tree3afac77c49b6aef887570232d05047b64b505481
parent18268185ec12f27cc1da76edb54ac133dab06aef (diff)
gpu: nvgpu: vgpu: modify subcontext header size
Per veid header mode is enabled for subcontext header. Allocate only context header size for subcontext header. Jira EVLR-2073 Change-Id: I2761dcac7e8e765acb6db22241e3a9214867f885 Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1607627 Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Nirav Patel <nipatel@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r--drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_subctx_gv11b.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_subctx_gv11b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_subctx_gv11b.c
index 6d8785e4..1e2de14d 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_subctx_gv11b.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_subctx_gv11b.c
@@ -17,6 +17,7 @@
17#include "gk20a/gk20a.h" 17#include "gk20a/gk20a.h"
18#include "common/linux/vgpu/vgpu.h" 18#include "common/linux/vgpu/vgpu.h"
19#include <linux/tegra_vgpu.h> 19#include <linux/tegra_vgpu.h>
20#include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h>
20 21
21int vgpu_gv11b_alloc_subctx_header(struct channel_gk20a *c) 22int vgpu_gv11b_alloc_subctx_header(struct channel_gk20a *c)
22{ 23{
@@ -24,14 +25,13 @@ int vgpu_gv11b_alloc_subctx_header(struct channel_gk20a *c)
24 struct tegra_vgpu_cmd_msg msg = {}; 25 struct tegra_vgpu_cmd_msg msg = {};
25 struct tegra_vgpu_alloc_ctx_header_params *p = 26 struct tegra_vgpu_alloc_ctx_header_params *p =
26 &msg.params.t19x.alloc_ctx_header; 27 &msg.params.t19x.alloc_ctx_header;
27 struct gr_gk20a *gr = &c->g->gr;
28 int err; 28 int err;
29 29
30 msg.cmd = TEGRA_VGPU_CMD_ALLOC_CTX_HEADER; 30 msg.cmd = TEGRA_VGPU_CMD_ALLOC_CTX_HEADER;
31 msg.handle = vgpu_get_handle(c->g); 31 msg.handle = vgpu_get_handle(c->g);
32 p->ch_handle = c->virt_ctx; 32 p->ch_handle = c->virt_ctx;
33 p->ctx_header_va = __nvgpu_vm_alloc_va(c->vm, 33 p->ctx_header_va = __nvgpu_vm_alloc_va(c->vm,
34 gr->ctx_vars.golden_image_size, 34 ctxsw_prog_fecs_header_v(),
35 gmmu_page_size_kernel); 35 gmmu_page_size_kernel);
36 if (!p->ctx_header_va) { 36 if (!p->ctx_header_va) {
37 nvgpu_err(c->g, "alloc va failed for ctx_header"); 37 nvgpu_err(c->g, "alloc va failed for ctx_header");