diff options
author | Richard Zhao <rizhao@nvidia.com> | 2015-12-23 18:15:45 -0500 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-01-19 11:34:55 -0500 |
commit | 7095a72e563b5d7969c5f09053e469906362428f (patch) | |
tree | 8723d3bddfd650c5f89aa51393cf8ee6f8be4bc2 | |
parent | b9cbb12132b52c268b3f727f50416efd75fead0f (diff) |
gpu: nvgpu: fix tsg bugs
- correct runlist entry type for tsg
- consider tsg when preempt channel
Bug 1617046
Change-Id: Ie067df17fb53ae91c49403637a5f35fc3710e0b3
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/926571
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 26 |
2 files changed, 10 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index f34df520..0c28d0bb 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -487,7 +487,7 @@ void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt) | |||
487 | ch->g->ops.fifo.disable_channel(ch); | 487 | ch->g->ops.fifo.disable_channel(ch); |
488 | 488 | ||
489 | if (channel_preempt) | 489 | if (channel_preempt) |
490 | ch->g->ops.fifo.preempt_channel(ch->g, ch->hw_chid); | 490 | gk20a_fifo_preempt(ch->g, ch); |
491 | 491 | ||
492 | /* ensure no fences are pending */ | 492 | /* ensure no fences are pending */ |
493 | mutex_lock(&ch->sync_lock); | 493 | mutex_lock(&ch->sync_lock); |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index ce91fd49..6b5807aa 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -2138,26 +2138,18 @@ static int gk20a_fifo_runlist_wait_pending(struct gk20a *g, u32 runlist_id) | |||
2138 | 2138 | ||
2139 | static inline u32 gk20a_get_tsg_runlist_entry_0(struct tsg_gk20a *tsg) | 2139 | static inline u32 gk20a_get_tsg_runlist_entry_0(struct tsg_gk20a *tsg) |
2140 | { | 2140 | { |
2141 | u32 runlist_entry_0 = 0; | 2141 | u32 runlist_entry_0 = ram_rl_entry_id_f(tsg->tsgid) | |
2142 | ram_rl_entry_type_tsg_f() | | ||
2143 | ram_rl_entry_tsg_length_f(tsg->num_active_channels); | ||
2142 | 2144 | ||
2143 | if (tsg->timeslice_timeout) | 2145 | if (tsg->timeslice_timeout) |
2144 | runlist_entry_0 = ram_rl_entry_id_f(tsg->tsgid) | | 2146 | runlist_entry_0 |= |
2145 | ram_rl_entry_type_f(ram_rl_entry_type_tsg_f()) | | 2147 | ram_rl_entry_timeslice_scale_f(tsg->timeslice_scale) | |
2146 | ram_rl_entry_timeslice_scale_f( | 2148 | ram_rl_entry_timeslice_timeout_f(tsg->timeslice_timeout); |
2147 | tsg->timeslice_scale) | | ||
2148 | ram_rl_entry_timeslice_timeout_f( | ||
2149 | tsg->timeslice_timeout) | | ||
2150 | ram_rl_entry_tsg_length_f( | ||
2151 | tsg->num_active_channels); | ||
2152 | else | 2149 | else |
2153 | runlist_entry_0 = ram_rl_entry_id_f(tsg->tsgid) | | 2150 | runlist_entry_0 |= |
2154 | ram_rl_entry_type_f(ram_rl_entry_type_tsg_f()) | | 2151 | ram_rl_entry_timeslice_scale_3_f() | |
2155 | ram_rl_entry_timeslice_scale_f( | 2152 | ram_rl_entry_timeslice_timeout_128_f(); |
2156 | ram_rl_entry_timeslice_scale_3_f()) | | ||
2157 | ram_rl_entry_timeslice_timeout_f( | ||
2158 | ram_rl_entry_timeslice_timeout_128_f()) | | ||
2159 | ram_rl_entry_tsg_length_f( | ||
2160 | tsg->num_active_channels); | ||
2161 | 2153 | ||
2162 | return runlist_entry_0; | 2154 | return runlist_entry_0; |
2163 | } | 2155 | } |