gpu: nvgpu: Add multiple engine and runlist support

This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt support for
   Volta GPU series
5) Removed hard coded engine_id logic and
   made generic way
6) Code cleanup for readability

JIRA DNVGPU-26

Change-Id: Ief3b586ff3d9f492f0277243b2a94952bab48786
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1156023
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 files changed, 28 insertions, 27 deletions

diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile
index 4761ba6e..4ea56d8e 100644
--- a/drivers/gpu/nvgpu/Makefile
+++ b/drivers/gpu/nvgpu/Makefile
@@ -10,7 +10,7 @@ nvgpu-y += \
         $(nvgpu-t19x)/gv11b/fb_gv11b.o \
         $(nvgpu-t19x)/gv11b/fifo_gv11b.o \
         $(nvgpu-t19x)/gv11b/mm_gv11b.o \
-        $(nvgpu-t19x)/gv11b/ce2_gv11b.o \
+        $(nvgpu-t19x)/gv11b/ce_gv11b.o \
         $(nvgpu-t19x)/gv11b/gr_ctx_gv11b.o \
         $(nvgpu-t19x)/gv11b/pmu_gv11b.o \
         $(nvgpu-t19x)/gv11b/therm_gv11b.o
diff --git a/drivers/gpu/nvgpu/gv11b/ce2_gv11b.c b/drivers/gpu/nvgpu/gv11b/ce_gv11b.c
index d4ba4003..961054e0 100644
--- a/drivers/gpu/nvgpu/gv11b/ce2_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/ce_gv11b.c
@@ -1,5 +1,5 @@
 /*
- * GV11B Graphics Copy Engine  (gr host)
+ * Volta GPU series Copy Engine.
  *
  * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
  *
@@ -13,16 +13,15 @@
  * more details.
  *
  * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ * this program.
  */
 
 #include "gk20a/gk20a.h" /* FERMI and MAXWELL classes defined here */
-#include "hw_ce2_gv11b.h"
-#include "gp10b/ce2_gp10b.h"
-#include "ce2_gv11b.h"
+#include "hw_ce_gv11b.h"
+#include "gp10b/ce_gp10b.h"
+#include "ce_gv11b.h"
 
-void gv11b_init_ce2(struct gpu_ops *gops)
+void gv11b_init_ce(struct gpu_ops *gops)
 {
-        gp10b_init_ce2(gops);
+        gp10b_init_ce(gops);
 }
diff --git a/drivers/gpu/nvgpu/gv11b/ce2_gv11b.h b/drivers/gpu/nvgpu/gv11b/ce_gv11b.h
index a7b2f99a..27dffa5d 100644
--- a/drivers/gpu/nvgpu/gv11b/ce2_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/ce_gv11b.h
@@ -1,6 +1,6 @@
 /*
  *
- * GV11B graphics copy engine
+ * Volta GPU series copy engine
  *
  * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
  *
@@ -14,14 +14,13 @@
  * more details.
  *
  * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ * this program.
  */
-#ifndef __CE2_GV11B_H__
-#define __CE2_GV11B_H__
+#ifndef __CE_GV11B_H__
+#define __CE_GV11B_H__
 
 struct gpu_ops;
 
-void gv11b_init_ce2(struct gpu_ops *gops);
+void gv11b_init_ce(struct gpu_ops *gops);
 
 #endif /*__CE2_GV11B_H__*/
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
index ad8e4eff..a4301fa9 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
@@ -1062,6 +1062,9 @@ static int gr_gv11b_dump_gr_status_regs(struct gk20a *g,
                            struct gk20a_debug_output *o)
 {
         struct gr_gk20a *gr = &g->gr;
+        u32 gr_engine_id;
+
+        gr_engine_id = gk20a_fifo_get_gr_engine_id(g);
 
         gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x\n",
                 gk20a_readl(g, gr_status_r()));
@@ -1082,7 +1085,7 @@ static int gr_gv11b_dump_gr_status_regs(struct gk20a *g,
         gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR  : 0x%x\n",
                 gk20a_readl(g, gr_fecs_intr_r()));
         gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x\n",
-                gk20a_readl(g, fifo_engine_status_r(ENGINE_GR_GK20A)));
+                gk20a_readl(g, fifo_engine_status_r(gr_engine_id)));
         gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x\n",
                 gk20a_readl(g, gr_activity_0_r()));
         gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x\n",
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index e340c97e..876b5748 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -26,7 +26,7 @@
 #include "gv11b/ltc_gv11b.h"
 #include "gv11b/fecs_trace_gv11b.h"
 #include "gv11b/gv11b.h"
-#include "gv11b/ce2_gv11b.h"
+#include "gv11b/ce_gv11b.h"
 #include "gv11b/gr_ctx_gv11b.h"
 #include "gv11b/mm_gv11b.h"
 #include "gv11b/pmu_gv11b.h"
@@ -47,7 +47,7 @@ int gv11b_init_hal(struct gk20a *g)
         gv11b_init_ltc(gops);
         gv11b_init_gr(gops);
         gv11b_init_fecs_trace_ops(gops);
-        gv11b_init_ce2(gops);
+        gv11b_init_ce(gops);
         gv11b_init_mm(gops);
         gv11b_init_gr_ctx(gops);
         gv11b_init_pmu_ops(gops);
diff --git a/drivers/gpu/nvgpu/gv11b/hw_ce2_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_ce_gv11b.h
index e58bf271..9f279207 100644
--- a/drivers/gpu/nvgpu/gv11b/hw_ce2_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/hw_ce_gv11b.h
@@ -47,34 +47,34 @@
  *         comparison with unshifted values appropriate for use in field <y>
  *         of register <x>.
  */
-#ifndef _hw_ce2_gv11b_h_
-#define _hw_ce2_gv11b_h_
+#ifndef _hw_ce_gv11b_h_
+#define _hw_ce_gv11b_h_
 
-static inline u32 ce2_intr_status_r(u32 i)
+static inline u32 ce_intr_status_r(u32 i)
 {
         return 0x00104410 + i*128;
 }
-static inline u32 ce2_intr_status_blockpipe_pending_f(void)
+static inline u32 ce_intr_status_blockpipe_pending_f(void)
 {
         return 0x1;
 }
-static inline u32 ce2_intr_status_blockpipe_reset_f(void)
+static inline u32 ce_intr_status_blockpipe_reset_f(void)
 {
         return 0x1;
 }
-static inline u32 ce2_intr_status_nonblockpipe_pending_f(void)
+static inline u32 ce_intr_status_nonblockpipe_pending_f(void)
 {
         return 0x2;
 }
-static inline u32 ce2_intr_status_nonblockpipe_reset_f(void)
+static inline u32 ce_intr_status_nonblockpipe_reset_f(void)
 {
         return 0x2;
 }
-static inline u32 ce2_intr_status_launcherr_pending_f(void)
+static inline u32 ce_intr_status_launcherr_pending_f(void)
 {
         return 0x4;
 }
-static inline u32 ce2_intr_status_launcherr_reset_f(void)
+static inline u32 ce_intr_status_launcherr_reset_f(void)
 {
         return 0x4;
 }