diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-09-21 20:38:13 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-10-01 16:31:03 -0400 |
commit | 6e97491b007d4231e1934896a423027fda61c4c2 (patch) | |
tree | bc79a9eacb9a4c443c2fc682ff958e18d9740371 | |
parent | 5b4451cad8875f5d72490db0f8e6776e506f720a (diff) |
gpu: nvgpu: Write patch_count after updating ctxsw
Bug 1686189
Change-Id: Idf92d3277a7e8932d11ece13e3b988609e49c74e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/802550
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-on: http://git-master/r/806180
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 672ea521..18f00c63 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -1641,16 +1641,6 @@ int gr_gk20a_load_golden_ctx_image(struct gk20a *g, | |||
1641 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_num_save_ops_o(), 0, 0); | 1641 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_num_save_ops_o(), 0, 0); |
1642 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_num_restore_ops_o(), 0, 0); | 1642 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_num_restore_ops_o(), 0, 0); |
1643 | 1643 | ||
1644 | virt_addr_lo = u64_lo32(ch_ctx->patch_ctx.mem.gpu_va); | ||
1645 | virt_addr_hi = u64_hi32(ch_ctx->patch_ctx.mem.gpu_va); | ||
1646 | |||
1647 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_patch_count_o(), 0, | ||
1648 | ch_ctx->patch_ctx.data_count); | ||
1649 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_patch_adr_lo_o(), 0, | ||
1650 | virt_addr_lo); | ||
1651 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_patch_adr_hi_o(), 0, | ||
1652 | virt_addr_hi); | ||
1653 | |||
1654 | /* no user for client managed performance counter ctx */ | 1644 | /* no user for client managed performance counter ctx */ |
1655 | data = gk20a_mem_rd32(ctx_ptr + ctxsw_prog_main_image_pm_o(), 0); | 1645 | data = gk20a_mem_rd32(ctx_ptr + ctxsw_prog_main_image_pm_o(), 0); |
1656 | data = data & ~ctxsw_prog_main_image_pm_mode_m(); | 1646 | data = data & ~ctxsw_prog_main_image_pm_mode_m(); |
@@ -1686,6 +1676,16 @@ int gr_gk20a_load_golden_ctx_image(struct gk20a *g, | |||
1686 | if (g->ops.gr.update_ctxsw_preemption_mode) | 1676 | if (g->ops.gr.update_ctxsw_preemption_mode) |
1687 | g->ops.gr.update_ctxsw_preemption_mode(g, ch_ctx, ctx_ptr); | 1677 | g->ops.gr.update_ctxsw_preemption_mode(g, ch_ctx, ctx_ptr); |
1688 | 1678 | ||
1679 | virt_addr_lo = u64_lo32(ch_ctx->patch_ctx.mem.gpu_va); | ||
1680 | virt_addr_hi = u64_hi32(ch_ctx->patch_ctx.mem.gpu_va); | ||
1681 | |||
1682 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_patch_count_o(), 0, | ||
1683 | ch_ctx->patch_ctx.data_count); | ||
1684 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_patch_adr_lo_o(), 0, | ||
1685 | virt_addr_lo); | ||
1686 | gk20a_mem_wr32(ctx_ptr + ctxsw_prog_main_image_patch_adr_hi_o(), 0, | ||
1687 | virt_addr_hi); | ||
1688 | |||
1689 | vunmap(ctx_ptr); | 1689 | vunmap(ctx_ptr); |
1690 | 1690 | ||
1691 | if (tegra_platform_is_linsim()) { | 1691 | if (tegra_platform_is_linsim()) { |