diff options
author | David Nieto <dmartineznie@nvidia.com> | 2017-10-19 13:12:24 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-23 01:15:22 -0400 |
commit | 6114553413297dbcae637bc50ef2ff2a6c0858d1 (patch) | |
tree | a32a295e5d13018fecff56f57684f3db51b1e532 | |
parent | 2904e3ac0081d4e898378f6ba667658c85547368 (diff) |
gpu: nvgpu: gv100: fix timeout handling
GV100 has a larger vidmem size and a slower sideband to sysmem so timeouts
need to be adjusted to avoid false positives.
JIRA: NVGPUGV100-36
Change-Id: I3cbc19aa1158c89bc48ae1fa6ec4bc755cd9389d
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1582092
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gv100/fifo_gv100.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/fifo_gv100.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/hal_gv100.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/mm_gv100.c | 13 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/mm_gv100.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 11 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 1 |
8 files changed, 37 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gv100/fifo_gv100.c b/drivers/gpu/nvgpu/gv100/fifo_gv100.c index e19301e6..79862f6b 100644 --- a/drivers/gpu/nvgpu/gv100/fifo_gv100.c +++ b/drivers/gpu/nvgpu/gv100/fifo_gv100.c | |||
@@ -26,7 +26,15 @@ | |||
26 | 26 | ||
27 | #include <nvgpu/hw/gv100/hw_ccsr_gv100.h> | 27 | #include <nvgpu/hw/gv100/hw_ccsr_gv100.h> |
28 | 28 | ||
29 | #define DEFAULT_FIFO_PREEMPT_TIMEOUT 0x3FFFFFUL | ||
30 | |||
29 | u32 gv100_fifo_get_num_fifos(struct gk20a *g) | 31 | u32 gv100_fifo_get_num_fifos(struct gk20a *g) |
30 | { | 32 | { |
31 | return ccsr_channel__size_1_v(); | 33 | return ccsr_channel__size_1_v(); |
32 | } | 34 | } |
35 | |||
36 | u32 gv100_fifo_get_preempt_timeout(struct gk20a *g) | ||
37 | { | ||
38 | return DEFAULT_FIFO_PREEMPT_TIMEOUT; | ||
39 | } | ||
40 | |||
diff --git a/drivers/gpu/nvgpu/gv100/fifo_gv100.h b/drivers/gpu/nvgpu/gv100/fifo_gv100.h index 3ffb417c..af6ad030 100644 --- a/drivers/gpu/nvgpu/gv100/fifo_gv100.h +++ b/drivers/gpu/nvgpu/gv100/fifo_gv100.h | |||
@@ -29,4 +29,5 @@ | |||
29 | struct gk20a; | 29 | struct gk20a; |
30 | 30 | ||
31 | u32 gv100_fifo_get_num_fifos(struct gk20a *g); | 31 | u32 gv100_fifo_get_num_fifos(struct gk20a *g); |
32 | u32 gv100_fifo_get_preempt_timeout(struct gk20a *g); | ||
32 | #endif | 33 | #endif |
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 4e05f22b..ff852168 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -424,6 +424,7 @@ static const struct gpu_ops gv100_ops = { | |||
424 | .mem_unlock = gv100_fb_memory_unlock, | 424 | .mem_unlock = gv100_fb_memory_unlock, |
425 | }, | 425 | }, |
426 | .fifo = { | 426 | .fifo = { |
427 | .get_preempt_timeout = gv100_fifo_get_preempt_timeout, | ||
427 | .init_fifo_setup_hw = gv11b_init_fifo_setup_hw, | 428 | .init_fifo_setup_hw = gv11b_init_fifo_setup_hw, |
428 | .bind_channel = channel_gm20b_bind, | 429 | .bind_channel = channel_gm20b_bind, |
429 | .unbind_channel = channel_gv11b_unbind, | 430 | .unbind_channel = channel_gv11b_unbind, |
@@ -470,7 +471,7 @@ static const struct gpu_ops gv100_ops = { | |||
470 | .intr_0_error_mask = gv11b_fifo_intr_0_error_mask, | 471 | .intr_0_error_mask = gv11b_fifo_intr_0_error_mask, |
471 | .is_preempt_pending = gv11b_fifo_is_preempt_pending, | 472 | .is_preempt_pending = gv11b_fifo_is_preempt_pending, |
472 | .init_pbdma_intr_descs = gv11b_fifo_init_pbdma_intr_descs, | 473 | .init_pbdma_intr_descs = gv11b_fifo_init_pbdma_intr_descs, |
473 | .reset_enable_hw = gv11b_init_fifo_reset_enable_hw, | 474 | .reset_enable_hw = gk20a_init_fifo_reset_enable_hw, |
474 | .teardown_ch_tsg = gv11b_fifo_teardown_ch_tsg, | 475 | .teardown_ch_tsg = gv11b_fifo_teardown_ch_tsg, |
475 | .handle_sched_error = gv11b_fifo_handle_sched_error, | 476 | .handle_sched_error = gv11b_fifo_handle_sched_error, |
476 | .handle_pbdma_intr_0 = gv11b_fifo_handle_pbdma_intr_0, | 477 | .handle_pbdma_intr_0 = gv11b_fifo_handle_pbdma_intr_0, |
@@ -523,7 +524,7 @@ static const struct gpu_ops gv100_ops = { | |||
523 | .vm_bind_channel = gk20a_vm_bind_channel, | 524 | .vm_bind_channel = gk20a_vm_bind_channel, |
524 | .fb_flush = gk20a_mm_fb_flush, | 525 | .fb_flush = gk20a_mm_fb_flush, |
525 | .l2_invalidate = gk20a_mm_l2_invalidate, | 526 | .l2_invalidate = gk20a_mm_l2_invalidate, |
526 | .l2_flush = gv11b_mm_l2_flush, | 527 | .l2_flush = gk20a_mm_l2_flush, |
527 | .cbc_clean = gk20a_mm_cbc_clean, | 528 | .cbc_clean = gk20a_mm_cbc_clean, |
528 | .set_big_page_size = gm20b_mm_set_big_page_size, | 529 | .set_big_page_size = gm20b_mm_set_big_page_size, |
529 | .get_big_page_sizes = gm20b_mm_get_big_page_sizes, | 530 | .get_big_page_sizes = gm20b_mm_get_big_page_sizes, |
@@ -542,6 +543,7 @@ static const struct gpu_ops gv100_ops = { | |||
542 | .init_bar2_mm_hw_setup = gv11b_init_bar2_mm_hw_setup, | 543 | .init_bar2_mm_hw_setup = gv11b_init_bar2_mm_hw_setup, |
543 | .remove_bar2_vm = gv11b_mm_remove_bar2_vm, | 544 | .remove_bar2_vm = gv11b_mm_remove_bar2_vm, |
544 | .fault_info_mem_destroy = gv11b_mm_fault_info_mem_destroy, | 545 | .fault_info_mem_destroy = gv11b_mm_fault_info_mem_destroy, |
546 | .get_flush_retries = gv100_mm_get_flush_retries, | ||
545 | }, | 547 | }, |
546 | .pramin = { | 548 | .pramin = { |
547 | .enter = gk20a_pramin_enter, | 549 | .enter = gk20a_pramin_enter, |
diff --git a/drivers/gpu/nvgpu/gv100/mm_gv100.c b/drivers/gpu/nvgpu/gv100/mm_gv100.c index 93688206..1b46faae 100644 --- a/drivers/gpu/nvgpu/gv100/mm_gv100.c +++ b/drivers/gpu/nvgpu/gv100/mm_gv100.c | |||
@@ -40,3 +40,16 @@ size_t gv100_mm_get_vidmem_size(struct gk20a *g) | |||
40 | 40 | ||
41 | return bytes; | 41 | return bytes; |
42 | } | 42 | } |
43 | |||
44 | u32 gv100_mm_get_flush_retries(struct gk20a *g, enum nvgpu_flush_op op) | ||
45 | { | ||
46 | switch (op) { | ||
47 | /* GV100 has a large FB so it needs larger timeouts */ | ||
48 | case NVGPU_FLUSH_FB: | ||
49 | return 2000; | ||
50 | case NVGPU_FLUSH_L2_FLUSH: | ||
51 | return 2000; | ||
52 | default: | ||
53 | return 200; /* Default retry timer */ | ||
54 | } | ||
55 | } | ||
diff --git a/drivers/gpu/nvgpu/gv100/mm_gv100.h b/drivers/gpu/nvgpu/gv100/mm_gv100.h index eba724f9..ea896503 100644 --- a/drivers/gpu/nvgpu/gv100/mm_gv100.h +++ b/drivers/gpu/nvgpu/gv100/mm_gv100.h | |||
@@ -28,5 +28,6 @@ | |||
28 | struct gk20a; | 28 | struct gk20a; |
29 | 29 | ||
30 | size_t gv100_mm_get_vidmem_size(struct gk20a *g); | 30 | size_t gv100_mm_get_vidmem_size(struct gk20a *g); |
31 | u32 gv100_mm_get_flush_retries(struct gk20a *g, enum nvgpu_flush_op op); | ||
31 | 32 | ||
32 | #endif | 33 | #endif |
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 7bb3d654..4a03e6d9 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | |||
@@ -372,6 +372,11 @@ u32 gv11b_fifo_intr_0_error_mask(struct gk20a *g) | |||
372 | return intr_0_error_mask; | 372 | return intr_0_error_mask; |
373 | } | 373 | } |
374 | 374 | ||
375 | u32 gv11b_fifo_get_preempt_timeout(struct gk20a *g) | ||
376 | { | ||
377 | return gk20a_get_gr_idle_timeout(g); | ||
378 | } | ||
379 | |||
375 | static int gv11b_fifo_poll_pbdma_chan_status(struct gk20a *g, u32 id, | 380 | static int gv11b_fifo_poll_pbdma_chan_status(struct gk20a *g, u32 id, |
376 | u32 pbdma_id, unsigned int timeout_rc_type) | 381 | u32 pbdma_id, unsigned int timeout_rc_type) |
377 | { | 382 | { |
@@ -405,7 +410,7 @@ static int gv11b_fifo_poll_pbdma_chan_status(struct gk20a *g, u32 id, | |||
405 | gk20a_writel(g, pbdma_intr_1_r(pbdma_id), pbdma_intr_1); | 410 | gk20a_writel(g, pbdma_intr_1_r(pbdma_id), pbdma_intr_1); |
406 | } | 411 | } |
407 | 412 | ||
408 | nvgpu_timeout_init(g, &timeout, gk20a_get_gr_idle_timeout(g), | 413 | nvgpu_timeout_init(g, &timeout, g->ops.fifo.get_preempt_timeout(g), |
409 | NVGPU_TIMER_CPU_TIMER); | 414 | NVGPU_TIMER_CPU_TIMER); |
410 | 415 | ||
411 | /* Verify that ch/tsg is no longer on the pbdma */ | 416 | /* Verify that ch/tsg is no longer on the pbdma */ |
@@ -465,7 +470,7 @@ static int gv11b_fifo_poll_eng_ctx_status(struct gk20a *g, u32 id, | |||
465 | u32 ctx_stat; | 470 | u32 ctx_stat; |
466 | int ret = -EBUSY; | 471 | int ret = -EBUSY; |
467 | 472 | ||
468 | nvgpu_timeout_init(g, &timeout, gk20a_get_gr_idle_timeout(g), | 473 | nvgpu_timeout_init(g, &timeout, g->ops.fifo.get_preempt_timeout(g), |
469 | NVGPU_TIMER_CPU_TIMER); | 474 | NVGPU_TIMER_CPU_TIMER); |
470 | 475 | ||
471 | /* Check if ch/tsg has saved off the engine or if ctxsw is hung */ | 476 | /* Check if ch/tsg has saved off the engine or if ctxsw is hung */ |
@@ -686,7 +691,7 @@ static int gv11b_fifo_poll_runlist_preempt_pending(struct gk20a *g, | |||
686 | u32 delay = GR_IDLE_CHECK_DEFAULT; | 691 | u32 delay = GR_IDLE_CHECK_DEFAULT; |
687 | int ret = -EBUSY; | 692 | int ret = -EBUSY; |
688 | 693 | ||
689 | nvgpu_timeout_init(g, &timeout, gk20a_get_gr_idle_timeout(g), | 694 | nvgpu_timeout_init(g, &timeout, g->ops.fifo.get_preempt_timeout(g), |
690 | NVGPU_TIMER_CPU_TIMER); | 695 | NVGPU_TIMER_CPU_TIMER); |
691 | do { | 696 | do { |
692 | if (!((gk20a_readl(g, fifo_runlist_preempt_r())) & | 697 | if (!((gk20a_readl(g, fifo_runlist_preempt_r())) & |
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h index f622aba8..fc1ddf83 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | |||
@@ -113,5 +113,5 @@ u32 gv11b_fifo_get_syncpt_incr_cmd_size(bool wfi_cmd); | |||
113 | int gv11b_init_fifo_setup_hw(struct gk20a *g); | 113 | int gv11b_init_fifo_setup_hw(struct gk20a *g); |
114 | 114 | ||
115 | void gv11b_fifo_tsg_verify_status_faulted(struct channel_gk20a *ch); | 115 | void gv11b_fifo_tsg_verify_status_faulted(struct channel_gk20a *ch); |
116 | 116 | u32 gv11b_fifo_get_preempt_timeout(struct gk20a *g); | |
117 | #endif | 117 | #endif |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 729727c9..5b10b7d2 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -438,6 +438,7 @@ static const struct gpu_ops gv11b_ops = { | |||
438 | gr_gv11b_pg_gr_load_gating_prod, | 438 | gr_gv11b_pg_gr_load_gating_prod, |
439 | }, | 439 | }, |
440 | .fifo = { | 440 | .fifo = { |
441 | .get_preempt_timeout = gv11b_fifo_get_preempt_timeout, | ||
441 | .init_fifo_setup_hw = gv11b_init_fifo_setup_hw, | 442 | .init_fifo_setup_hw = gv11b_init_fifo_setup_hw, |
442 | .bind_channel = channel_gm20b_bind, | 443 | .bind_channel = channel_gm20b_bind, |
443 | .unbind_channel = channel_gv11b_unbind, | 444 | .unbind_channel = channel_gv11b_unbind, |