gpu: nvgpu: Use internal nvgpu_warpstate

Replace use of ioctl structure warpstate with internal
nvgpu_warptate.

JIRA NVGPU-259

Change-Id: I5170364d0443235cee471b87fa332fc09588f5d3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1578684
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

6 files changed, 46 insertions, 12 deletions

diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
index 88c8debf..4bb79375 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
@@ -429,15 +429,24 @@ static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g,
                 struct nvgpu_gpu_wait_pause_args *args)
 {
         int err;
-        struct warpstate *w_state;
-        u32 sm_count, size;
+        struct warpstate *ioctl_w_state;
+        struct nvgpu_warpstate *w_state = NULL;
+        u32 sm_count, ioctl_size, size, sm_id;
 
         sm_count = g->gr.gpc_count * g->gr.tpc_count;
-        size = sm_count * sizeof(struct warpstate);
-        w_state = nvgpu_kzalloc(g, size);
-        if (!w_state)
+
+        ioctl_size = sm_count * sizeof(struct warpstate);
+        ioctl_w_state = nvgpu_kzalloc(g, ioctl_size);
+        if (!ioctl_w_state)
                 return -ENOMEM;
 
+        size = sm_count * sizeof(struct nvgpu_warpstate);
+        w_state = nvgpu_kzalloc(g, size);
+        if (!w_state) {
+                err = -ENOMEM;
+                goto out_free;
+        }
+
         err = gk20a_busy(g);
         if (err)
                 goto out_free;
@@ -445,8 +454,23 @@ static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g,
         nvgpu_mutex_acquire(&g->dbg_sessions_lock);
         g->ops.gr.wait_for_pause(g, w_state);
 
+        for (sm_id = 0; sm_id < g->gr.no_of_sm; sm_id++) {
+                ioctl_w_state[sm_id].valid_warps[0] =
+                        w_state[sm_id].valid_warps[0];
+                ioctl_w_state[sm_id].valid_warps[1] =
+                        w_state[sm_id].valid_warps[1];
+                ioctl_w_state[sm_id].trapped_warps[0] =
+                        w_state[sm_id].trapped_warps[0];
+                ioctl_w_state[sm_id].trapped_warps[1] =
+                        w_state[sm_id].trapped_warps[1];
+                ioctl_w_state[sm_id].paused_warps[0] =
+                        w_state[sm_id].paused_warps[0];
+                ioctl_w_state[sm_id].paused_warps[1] =
+                        w_state[sm_id].paused_warps[1];
+        }
         /* Copy to user space - pointed by "args->pwarpstate" */
-        if (copy_to_user((void __user *)(uintptr_t)args->pwarpstate, w_state, size)) {
+        if (copy_to_user((void __user *)(uintptr_t)args->pwarpstate,
+            w_state, ioctl_size)) {
                 gk20a_dbg_fn("copy_to_user failed!");
                 err = -EFAULT;
         }
@@ -457,6 +481,7 @@ static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g,
 
 out_free:
         nvgpu_kfree(g, w_state);
+        nvgpu_kfree(g, ioctl_w_state);
 
         return err;
 }
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 8efb009a..ead1f69e 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -41,6 +41,7 @@ struct nvgpu_clk_pll_debug_data;
 struct nvgpu_nvhost_dev;
 struct nvgpu_cpu_time_correlation_sample;
 struct nvgpu_mem_sgt;
+struct nvgpu_warpstate;
 
 #include <nvgpu/lock.h>
 #include <nvgpu/thread.h>
@@ -308,7 +309,7 @@ struct gpu_ops {
                 int (*set_sm_debug_mode)(struct gk20a *g, struct channel_gk20a *ch,
                                         u64 sms, bool enable);
                 void (*bpt_reg_info)(struct gk20a *g,
-                                struct warpstate *w_state);
+                                struct nvgpu_warpstate *w_state);
                 void (*get_access_map)(struct gk20a *g,
                                       u32 **whitelist, int *num_entries);
                 int (*handle_fecs_error)(struct gk20a *g,
@@ -407,7 +408,7 @@ struct gpu_ops {
                 void (*load_tpc_mask)(struct gk20a *g);
                 int (*inval_icache)(struct gk20a *g, struct channel_gk20a *ch);
                 int (*trigger_suspend)(struct gk20a *g);
-                int (*wait_for_pause)(struct gk20a *g, struct warpstate *w_state);
+                int (*wait_for_pause)(struct gk20a *g, struct nvgpu_warpstate *w_state);
                 int (*resume_from_pause)(struct gk20a *g);
                 int (*clear_sm_errors)(struct gk20a *g);
                 u32 (*tpc_enabled_exceptions)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 6f829282..1ade6b6a 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -8488,7 +8488,7 @@ int gr_gk20a_trigger_suspend(struct gk20a *g)
         return err;
 }
 
-int gr_gk20a_wait_for_pause(struct gk20a *g, struct warpstate *w_state)
+int gr_gk20a_wait_for_pause(struct gk20a *g, struct nvgpu_warpstate *w_state)
 {
         int err = 0;
         struct gr_gk20a *gr = &g->gr;
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index a78f0498..5fab43ca 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -51,6 +51,7 @@
 #define GK20A_TIMEOUT_FPGA              100000 /* 100 sec */
 
 struct channel_gk20a;
+struct nvgpu_warpstate;
 
 enum /* global_ctx_buffer */ {
         CIRCULAR                = 0,
@@ -488,6 +489,12 @@ struct fecs_method_op_gk20a {
 
 };
 
+struct nvgpu_warpstate {
+        u64 valid_warps[2];
+        u64 trapped_warps[2];
+        u64 paused_warps[2];
+};
+
 struct gpu_ops;
 int gr_gk20a_load_golden_ctx_image(struct gk20a *g,
                                         struct channel_gk20a *c);
@@ -718,7 +725,7 @@ void gk20a_gr_enable_gpc_exceptions(struct gk20a *g);
 void gk20a_gr_enable_exceptions(struct gk20a *g);
 int gr_gk20a_inval_icache(struct gk20a *g, struct channel_gk20a *ch);
 int gr_gk20a_trigger_suspend(struct gk20a *g);
-int gr_gk20a_wait_for_pause(struct gk20a *g, struct warpstate *w_state);
+int gr_gk20a_wait_for_pause(struct gk20a *g, struct nvgpu_warpstate *w_state);
 int gr_gk20a_resume_from_pause(struct gk20a *g);
 int gr_gk20a_clear_sm_errors(struct gk20a *g);
 u32 gr_gk20a_tpc_enabled_exceptions(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 05c6dc5f..92096cfa 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -1140,7 +1140,7 @@ void gr_gm20b_enable_cde_in_fecs(struct gk20a *g, struct nvgpu_mem *mem)
         nvgpu_mem_wr(g, mem, ctxsw_prog_main_image_ctl_o(), cde_v);
 }
 
-void gr_gm20b_bpt_reg_info(struct gk20a *g, struct warpstate *w_state)
+void gr_gm20b_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state)
 {
         /* Check if we have at least one valid warp */
         /* get paused state on maxwell */
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h
index c7a84b0a..67f1ea29 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h
@@ -26,6 +26,7 @@
 #define _NVHOST_GM20B_GR_MMU_H
 
 struct gk20a;
+struct nvgpu_warpstate;
 
 enum {
         MAXWELL_B               = 0xB197,
@@ -112,7 +113,7 @@ u32 *gr_gm20b_rop_l2_en_mask(struct gk20a *g);
 u32 gr_gm20b_get_max_fbps_count(struct gk20a *g);
 void gr_gm20b_init_cyclestats(struct gk20a *g);
 void gr_gm20b_enable_cde_in_fecs(struct gk20a *g, struct nvgpu_mem *mem);
-void gr_gm20b_bpt_reg_info(struct gk20a *g, struct warpstate *w_state);
+void gr_gm20b_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state);
 void gr_gm20b_get_access_map(struct gk20a *g,
                                    u32 **whitelist, int *num_entries);
 int gm20b_gr_record_sm_error_state(struct gk20a *g, u32 gpc, u32 tpc);