diff options
author | Richard Zhao <rizhao@nvidia.com> | 2018-01-25 19:51:54 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-01-31 05:40:52 -0500 |
commit | 5326dfe3fa59e7d465ffc2f0d7f81aaf9de48278 (patch) | |
tree | 94ec53a97a665fbcbf8004614c65b5090fb89b70 | |
parent | b386768d323c95f530dd28b695927426e52fe0dc (diff) |
gpu: nvgpu: vgpu: add vgpu_ivc_* wrappers
tegra_gr_comm_* are wrapped as vgpu_ivc_*, which helps make vgpu code
more common.
Jira EVLR-2364
Change-Id: Id49462ed6c176c73ceee8c6bc41104447748e187
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1645656
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/Makefile | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/dbg_vgpu.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_mm_gp10b.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/vgpu.c | 21 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/vgpu.h | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/vgpu_ivc.c | 77 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/vgpu/vgpu_ivc.h | 45 |
9 files changed, 151 insertions, 25 deletions
diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 626fea24..d887f67b 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile | |||
@@ -180,7 +180,8 @@ nvgpu-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += \ | |||
180 | common/linux/vgpu/clk_vgpu.o \ | 180 | common/linux/vgpu/clk_vgpu.o \ |
181 | common/linux/vgpu/css_vgpu.o \ | 181 | common/linux/vgpu/css_vgpu.o \ |
182 | common/linux/vgpu/gm20b/vgpu_gr_gm20b.o \ | 182 | common/linux/vgpu/gm20b/vgpu_gr_gm20b.o \ |
183 | common/linux/vgpu/sysfs_vgpu.o | 183 | common/linux/vgpu/sysfs_vgpu.o \ |
184 | common/linux/vgpu/vgpu_ivc.o | ||
184 | 185 | ||
185 | nvgpu-$(CONFIG_COMMON_CLK) += \ | 186 | nvgpu-$(CONFIG_COMMON_CLK) += \ |
186 | common/linux/clk.o | 187 | common/linux/clk.o |
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/dbg_vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/dbg_vgpu.c index ce72fb03..ec6fd875 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/dbg_vgpu.c +++ b/drivers/gpu/nvgpu/common/linux/vgpu/dbg_vgpu.c | |||
@@ -14,7 +14,8 @@ | |||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/tegra_gr_comm.h> | 17 | #include <nvgpu/vgpu/vgpu_ivc.h> |
18 | |||
18 | #include <linux/tegra_vgpu.h> | 19 | #include <linux/tegra_vgpu.h> |
19 | #include <uapi/linux/nvgpu.h> | 20 | #include <uapi/linux/nvgpu.h> |
20 | 21 | ||
@@ -42,7 +43,7 @@ int vgpu_exec_regops(struct dbg_session_gk20a *dbg_s, | |||
42 | gk20a_dbg_fn(""); | 43 | gk20a_dbg_fn(""); |
43 | BUG_ON(sizeof(*ops) != sizeof(struct tegra_vgpu_reg_op)); | 44 | BUG_ON(sizeof(*ops) != sizeof(struct tegra_vgpu_reg_op)); |
44 | 45 | ||
45 | handle = tegra_gr_comm_oob_get_ptr(tegra_gr_comm_get_server_vmid(), | 46 | handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(), |
46 | TEGRA_VGPU_QUEUE_CMD, | 47 | TEGRA_VGPU_QUEUE_CMD, |
47 | &oob, &oob_size); | 48 | &oob, &oob_size); |
48 | if (!handle) | 49 | if (!handle) |
@@ -68,7 +69,7 @@ int vgpu_exec_regops(struct dbg_session_gk20a *dbg_s, | |||
68 | memcpy(ops, oob, ops_size); | 69 | memcpy(ops, oob, ops_size); |
69 | 70 | ||
70 | fail: | 71 | fail: |
71 | tegra_gr_comm_oob_put_ptr(handle); | 72 | vgpu_ivc_oob_put_ptr(handle); |
72 | return err; | 73 | return err; |
73 | } | 74 | } |
74 | 75 | ||
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c index 72e1190d..5dbc57a4 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c | |||
@@ -499,7 +499,7 @@ static int vgpu_submit_runlist(struct gk20a *g, u64 handle, u8 runlist_id, | |||
499 | void *oob; | 499 | void *oob; |
500 | size_t size, oob_size; | 500 | size_t size, oob_size; |
501 | 501 | ||
502 | oob_handle = tegra_gr_comm_oob_get_ptr(tegra_gr_comm_get_server_vmid(), | 502 | oob_handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(), |
503 | TEGRA_VGPU_QUEUE_CMD, | 503 | TEGRA_VGPU_QUEUE_CMD, |
504 | &oob, &oob_size); | 504 | &oob, &oob_size); |
505 | if (!oob_handle) | 505 | if (!oob_handle) |
@@ -523,7 +523,7 @@ static int vgpu_submit_runlist(struct gk20a *g, u64 handle, u8 runlist_id, | |||
523 | err = (err || msg.ret) ? -1 : 0; | 523 | err = (err || msg.ret) ? -1 : 0; |
524 | 524 | ||
525 | done: | 525 | done: |
526 | tegra_gr_comm_oob_put_ptr(oob_handle); | 526 | vgpu_ivc_oob_put_ptr(oob_handle); |
527 | return err; | 527 | return err; |
528 | } | 528 | } |
529 | 529 | ||
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_mm_gp10b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_mm_gp10b.c index 5786783c..72214d3c 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_mm_gp10b.c +++ b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_mm_gp10b.c | |||
@@ -95,7 +95,7 @@ u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm, | |||
95 | } | 95 | } |
96 | } | 96 | } |
97 | 97 | ||
98 | handle = tegra_gr_comm_oob_get_ptr(tegra_gr_comm_get_server_vmid(), | 98 | handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(), |
99 | TEGRA_VGPU_QUEUE_CMD, | 99 | TEGRA_VGPU_QUEUE_CMD, |
100 | (void **)&mem_desc, &oob_size); | 100 | (void **)&mem_desc, &oob_size); |
101 | if (!handle) { | 101 | if (!handle) { |
@@ -179,11 +179,11 @@ u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm, | |||
179 | 179 | ||
180 | /* TLB invalidate handled on server side */ | 180 | /* TLB invalidate handled on server side */ |
181 | 181 | ||
182 | tegra_gr_comm_oob_put_ptr(handle); | 182 | vgpu_ivc_oob_put_ptr(handle); |
183 | return map_offset; | 183 | return map_offset; |
184 | fail: | 184 | fail: |
185 | if (handle) | 185 | if (handle) |
186 | tegra_gr_comm_oob_put_ptr(handle); | 186 | vgpu_ivc_oob_put_ptr(handle); |
187 | nvgpu_err(g, "Failed: err=%d, msg.ret=%d", err, msg.ret); | 187 | nvgpu_err(g, "Failed: err=%d, msg.ret=%d", err, msg.ret); |
188 | nvgpu_err(g, | 188 | nvgpu_err(g, |
189 | " Map: %-5s GPU virt %#-12llx +%#-9llx " | 189 | " Map: %-5s GPU virt %#-12llx +%#-9llx " |
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.c index 34862702..1fd3e34f 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.c | |||
@@ -1121,7 +1121,7 @@ static int vgpu_gr_suspend_resume_contexts(struct gk20a *g, | |||
1121 | nvgpu_mutex_acquire(&g->dbg_sessions_lock); | 1121 | nvgpu_mutex_acquire(&g->dbg_sessions_lock); |
1122 | nvgpu_mutex_acquire(&dbg_s->ch_list_lock); | 1122 | nvgpu_mutex_acquire(&dbg_s->ch_list_lock); |
1123 | 1123 | ||
1124 | handle = tegra_gr_comm_oob_get_ptr(tegra_gr_comm_get_server_vmid(), | 1124 | handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(), |
1125 | TEGRA_VGPU_QUEUE_CMD, | 1125 | TEGRA_VGPU_QUEUE_CMD, |
1126 | (void **)&oob, &oob_size); | 1126 | (void **)&oob, &oob_size); |
1127 | if (!handle) { | 1127 | if (!handle) { |
@@ -1166,7 +1166,7 @@ static int vgpu_gr_suspend_resume_contexts(struct gk20a *g, | |||
1166 | 1166 | ||
1167 | done: | 1167 | done: |
1168 | if (handle) | 1168 | if (handle) |
1169 | tegra_gr_comm_oob_put_ptr(handle); | 1169 | vgpu_ivc_oob_put_ptr(handle); |
1170 | nvgpu_mutex_release(&dbg_s->ch_list_lock); | 1170 | nvgpu_mutex_release(&dbg_s->ch_list_lock); |
1171 | nvgpu_mutex_release(&g->dbg_sessions_lock); | 1171 | nvgpu_mutex_release(&g->dbg_sessions_lock); |
1172 | *ctx_resident_ch_fd = channel_fd; | 1172 | *ctx_resident_ch_fd = channel_fd; |
@@ -1238,7 +1238,7 @@ int vgpu_gr_init_sm_id_table(struct gk20a *g) | |||
1238 | return err; | 1238 | return err; |
1239 | } | 1239 | } |
1240 | 1240 | ||
1241 | handle = tegra_gr_comm_oob_get_ptr(tegra_gr_comm_get_server_vmid(), | 1241 | handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(), |
1242 | TEGRA_VGPU_QUEUE_CMD, | 1242 | TEGRA_VGPU_QUEUE_CMD, |
1243 | (void **)&entry, &oob_size); | 1243 | (void **)&entry, &oob_size); |
1244 | if (!handle) | 1244 | if (!handle) |
@@ -1261,7 +1261,7 @@ int vgpu_gr_init_sm_id_table(struct gk20a *g) | |||
1261 | sm_info->sm_index = entry->sm_index; | 1261 | sm_info->sm_index = entry->sm_index; |
1262 | sm_info->global_tpc_index = entry->global_tpc_index; | 1262 | sm_info->global_tpc_index = entry->global_tpc_index; |
1263 | } | 1263 | } |
1264 | tegra_gr_comm_oob_put_ptr(handle); | 1264 | vgpu_ivc_oob_put_ptr(handle); |
1265 | 1265 | ||
1266 | return 0; | 1266 | return 0; |
1267 | } | 1267 | } |
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/vgpu.c index 3d5afcf9..6bd34a57 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/vgpu.c +++ b/drivers/gpu/nvgpu/common/linux/vgpu/vgpu.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/dma-mapping.h> | 21 | #include <linux/dma-mapping.h> |
22 | #include <linux/pm_runtime.h> | 22 | #include <linux/pm_runtime.h> |
23 | #include <linux/pm_qos.h> | 23 | #include <linux/pm_qos.h> |
24 | #include <linux/platform_device.h> | ||
24 | #include <soc/tegra/chip-id.h> | 25 | #include <soc/tegra/chip-id.h> |
25 | #include <uapi/linux/nvgpu.h> | 26 | #include <uapi/linux/nvgpu.h> |
26 | 27 | ||
@@ -49,11 +50,11 @@ | |||
49 | 50 | ||
50 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | 51 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> |
51 | 52 | ||
52 | static inline int vgpu_comm_init(struct platform_device *pdev) | 53 | static inline int vgpu_comm_init(struct gk20a *g) |
53 | { | 54 | { |
54 | size_t queue_sizes[] = { TEGRA_VGPU_QUEUE_SIZES }; | 55 | size_t queue_sizes[] = { TEGRA_VGPU_QUEUE_SIZES }; |
55 | 56 | ||
56 | return tegra_gr_comm_init(pdev, 3, queue_sizes, TEGRA_VGPU_QUEUE_CMD, | 57 | return vgpu_ivc_init(g, 3, queue_sizes, TEGRA_VGPU_QUEUE_CMD, |
57 | ARRAY_SIZE(queue_sizes)); | 58 | ARRAY_SIZE(queue_sizes)); |
58 | } | 59 | } |
59 | 60 | ||
@@ -61,7 +62,7 @@ static inline void vgpu_comm_deinit(void) | |||
61 | { | 62 | { |
62 | size_t queue_sizes[] = { TEGRA_VGPU_QUEUE_SIZES }; | 63 | size_t queue_sizes[] = { TEGRA_VGPU_QUEUE_SIZES }; |
63 | 64 | ||
64 | tegra_gr_comm_deinit(TEGRA_VGPU_QUEUE_CMD, ARRAY_SIZE(queue_sizes)); | 65 | vgpu_ivc_deinit(TEGRA_VGPU_QUEUE_CMD, ARRAY_SIZE(queue_sizes)); |
65 | } | 66 | } |
66 | 67 | ||
67 | int vgpu_comm_sendrecv(struct tegra_vgpu_cmd_msg *msg, size_t size_in, | 68 | int vgpu_comm_sendrecv(struct tegra_vgpu_cmd_msg *msg, size_t size_in, |
@@ -72,12 +73,12 @@ int vgpu_comm_sendrecv(struct tegra_vgpu_cmd_msg *msg, size_t size_in, | |||
72 | void *data = msg; | 73 | void *data = msg; |
73 | int err; | 74 | int err; |
74 | 75 | ||
75 | err = tegra_gr_comm_sendrecv(tegra_gr_comm_get_server_vmid(), | 76 | err = vgpu_ivc_sendrecv(vgpu_ivc_get_server_vmid(), |
76 | TEGRA_VGPU_QUEUE_CMD, &handle, &data, &size); | 77 | TEGRA_VGPU_QUEUE_CMD, &handle, &data, &size); |
77 | if (!err) { | 78 | if (!err) { |
78 | WARN_ON(size < size_out); | 79 | WARN_ON(size < size_out); |
79 | memcpy(msg, data, size_out); | 80 | memcpy(msg, data, size_out); |
80 | tegra_gr_comm_release(handle); | 81 | vgpu_ivc_release(handle); |
81 | } | 82 | } |
82 | 83 | ||
83 | return err; | 84 | return err; |
@@ -149,7 +150,7 @@ static int vgpu_intr_thread(void *dev_id) | |||
149 | size_t size; | 150 | size_t size; |
150 | int err; | 151 | int err; |
151 | 152 | ||
152 | err = tegra_gr_comm_recv(TEGRA_VGPU_QUEUE_INTR, &handle, | 153 | err = vgpu_ivc_recv(TEGRA_VGPU_QUEUE_INTR, &handle, |
153 | (void **)&msg, &size, &sender); | 154 | (void **)&msg, &size, &sender); |
154 | if (err == -ETIME) | 155 | if (err == -ETIME) |
155 | continue; | 156 | continue; |
@@ -157,7 +158,7 @@ static int vgpu_intr_thread(void *dev_id) | |||
157 | continue; | 158 | continue; |
158 | 159 | ||
159 | if (msg->event == TEGRA_VGPU_EVENT_ABORT) { | 160 | if (msg->event == TEGRA_VGPU_EVENT_ABORT) { |
160 | tegra_gr_comm_release(handle); | 161 | vgpu_ivc_release(handle); |
161 | break; | 162 | break; |
162 | } | 163 | } |
163 | 164 | ||
@@ -193,7 +194,7 @@ static int vgpu_intr_thread(void *dev_id) | |||
193 | break; | 194 | break; |
194 | } | 195 | } |
195 | 196 | ||
196 | tegra_gr_comm_release(handle); | 197 | vgpu_ivc_release(handle); |
197 | } | 198 | } |
198 | 199 | ||
199 | while (!nvgpu_thread_should_stop(&priv->intr_handler)) | 200 | while (!nvgpu_thread_should_stop(&priv->intr_handler)) |
@@ -225,7 +226,7 @@ static void vgpu_remove_support(struct gk20a *g) | |||
225 | g->mm.remove_support(&g->mm); | 226 | g->mm.remove_support(&g->mm); |
226 | 227 | ||
227 | msg.event = TEGRA_VGPU_EVENT_ABORT; | 228 | msg.event = TEGRA_VGPU_EVENT_ABORT; |
228 | err = tegra_gr_comm_send(TEGRA_GR_COMM_ID_SELF, TEGRA_VGPU_QUEUE_INTR, | 229 | err = vgpu_ivc_send(vgpu_ivc_get_peer_self(), TEGRA_VGPU_QUEUE_INTR, |
229 | &msg, sizeof(msg)); | 230 | &msg, sizeof(msg)); |
230 | WARN_ON(err); | 231 | WARN_ON(err); |
231 | nvgpu_thread_stop(&priv->intr_handler); | 232 | nvgpu_thread_stop(&priv->intr_handler); |
@@ -699,7 +700,7 @@ int vgpu_probe(struct platform_device *pdev) | |||
699 | } | 700 | } |
700 | } | 701 | } |
701 | 702 | ||
702 | err = vgpu_comm_init(pdev); | 703 | err = vgpu_comm_init(gk20a); |
703 | if (err) { | 704 | if (err) { |
704 | dev_err(dev, "failed to init comm interface\n"); | 705 | dev_err(dev, "failed to init comm interface\n"); |
705 | return -ENOSYS; | 706 | return -ENOSYS; |
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/vgpu.h b/drivers/gpu/nvgpu/common/linux/vgpu/vgpu.h index 20624240..f59ad5bf 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/vgpu.h +++ b/drivers/gpu/nvgpu/common/linux/vgpu/vgpu.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Virtualized GPU Interfaces | 2 | * Virtualized GPU Interfaces |
3 | * | 3 | * |
4 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -26,7 +26,8 @@ struct tegra_vgpu_cmd_msg; | |||
26 | struct gk20a_platform; | 26 | struct gk20a_platform; |
27 | 27 | ||
28 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION | 28 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION |
29 | #include <linux/tegra_gr_comm.h> | 29 | #include <nvgpu/vgpu/vgpu_ivc.h> |
30 | |||
30 | #include <linux/tegra_vgpu.h> | 31 | #include <linux/tegra_vgpu.h> |
31 | #include "gk20a/gk20a.h" | 32 | #include "gk20a/gk20a.h" |
32 | #include "common/linux/platform_gk20a.h" | 33 | #include "common/linux/platform_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/vgpu_ivc.c b/drivers/gpu/nvgpu/common/linux/vgpu/vgpu_ivc.c new file mode 100644 index 00000000..b28b5013 --- /dev/null +++ b/drivers/gpu/nvgpu/common/linux/vgpu/vgpu_ivc.c | |||
@@ -0,0 +1,77 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2018, NVIDIA Corporation. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #include <nvgpu/types.h> | ||
18 | #include <linux/tegra_gr_comm.h> | ||
19 | |||
20 | #include "common/linux/os_linux.h" | ||
21 | |||
22 | int vgpu_ivc_init(struct gk20a *g, u32 elems, | ||
23 | const size_t *queue_sizes, u32 queue_start, u32 num_queues) | ||
24 | { | ||
25 | struct platform_device *pdev = to_platform_device(dev_from_gk20a(g)); | ||
26 | |||
27 | return tegra_gr_comm_init(pdev, elems, queue_sizes, queue_start, | ||
28 | num_queues); | ||
29 | } | ||
30 | |||
31 | void vgpu_ivc_deinit(u32 queue_start, u32 num_queues) | ||
32 | { | ||
33 | tegra_gr_comm_deinit(queue_start, num_queues); | ||
34 | } | ||
35 | |||
36 | void vgpu_ivc_release(void *handle) | ||
37 | { | ||
38 | tegra_gr_comm_release(handle); | ||
39 | } | ||
40 | |||
41 | u32 vgpu_ivc_get_server_vmid(void) | ||
42 | { | ||
43 | return tegra_gr_comm_get_server_vmid(); | ||
44 | } | ||
45 | |||
46 | int vgpu_ivc_recv(u32 index, void **handle, void **data, | ||
47 | size_t *size, u32 *sender) | ||
48 | { | ||
49 | return tegra_gr_comm_recv(index, handle, data, size, sender); | ||
50 | } | ||
51 | |||
52 | int vgpu_ivc_send(u32 peer, u32 index, void *data, size_t size) | ||
53 | { | ||
54 | return tegra_gr_comm_send(peer, index, data, size); | ||
55 | } | ||
56 | |||
57 | int vgpu_ivc_sendrecv(u32 peer, u32 index, void **handle, | ||
58 | void **data, size_t *size) | ||
59 | { | ||
60 | return tegra_gr_comm_sendrecv(peer, index, handle, data, size); | ||
61 | } | ||
62 | |||
63 | u32 vgpu_ivc_get_peer_self(void) | ||
64 | { | ||
65 | return TEGRA_GR_COMM_ID_SELF; | ||
66 | } | ||
67 | |||
68 | void *vgpu_ivc_oob_get_ptr(u32 peer, u32 index, void **ptr, | ||
69 | size_t *size) | ||
70 | { | ||
71 | return tegra_gr_comm_oob_get_ptr(peer, index, ptr, size); | ||
72 | } | ||
73 | |||
74 | void vgpu_ivc_oob_put_ptr(void *handle) | ||
75 | { | ||
76 | tegra_gr_comm_oob_put_ptr(handle); | ||
77 | } | ||
diff --git a/drivers/gpu/nvgpu/include/nvgpu/vgpu/vgpu_ivc.h b/drivers/gpu/nvgpu/include/nvgpu/vgpu/vgpu_ivc.h new file mode 100644 index 00000000..e7e40269 --- /dev/null +++ b/drivers/gpu/nvgpu/include/nvgpu/vgpu/vgpu_ivc.h | |||
@@ -0,0 +1,45 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #ifndef __VGPU_IVC_H__ | ||
24 | #define __VGPU_IVC_H__ | ||
25 | |||
26 | #include <nvgpu/types.h> | ||
27 | |||
28 | struct gk20a; | ||
29 | |||
30 | int vgpu_ivc_init(struct gk20a *g, u32 elems, | ||
31 | const size_t *queue_sizes, u32 queue_start, u32 num_queues); | ||
32 | void vgpu_ivc_deinit(u32 queue_start, u32 num_queues); | ||
33 | void vgpu_ivc_release(void *handle); | ||
34 | u32 vgpu_ivc_get_server_vmid(void); | ||
35 | int vgpu_ivc_recv(u32 index, void **handle, void **data, | ||
36 | size_t *size, u32 *sender); | ||
37 | int vgpu_ivc_send(u32 peer, u32 index, void *data, size_t size); | ||
38 | int vgpu_ivc_sendrecv(u32 peer, u32 index, void **handle, | ||
39 | void **data, size_t *size); | ||
40 | u32 vgpu_ivc_get_peer_self(void); | ||
41 | void *vgpu_ivc_oob_get_ptr(u32 peer, u32 index, void **ptr, | ||
42 | size_t *size); | ||
43 | void vgpu_ivc_oob_put_ptr(void *handle); | ||
44 | |||
45 | #endif | ||