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author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-09-07 18:09:54 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-10-08 19:43:32 -0400 |
commit | 4cff26cd5b0096eeb26114cf36df8e2cb91821a8 (patch) | |
tree | 7535959d3048b9025fcfadaddace348d6d2e217b | |
parent | f0ad41769fc8caa9be1586f1eeecc3e00cc0839f (diff) |
gpu: nvgpu: Enable BLCG & SLCG on known dGPU
JIRA DNVGPU-72
JIRA DNVGPU-73
Change-Id: I5932779f6913b55692f69fac692a1a66a9912fc4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1216562
(cherry picked from commit d44be7714afa1f4257a81799c326b453da3d2d5a)
Reviewed-on: http://git-master/r/1233350
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
-rw-r--r-- | drivers/gpu/nvgpu/pci.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/pci.c b/drivers/gpu/nvgpu/pci.c index e06fddd8..291a4057 100644 --- a/drivers/gpu/nvgpu/pci.c +++ b/drivers/gpu/nvgpu/pci.c | |||
@@ -63,16 +63,24 @@ static struct gk20a_platform nvgpu_pci_device = { | |||
63 | .vidmem_is_vidmem = true, | 63 | .vidmem_is_vidmem = true, |
64 | }; | 64 | }; |
65 | 65 | ||
66 | #define NVGPU_PCI_ENABLE_BLCG BIT(0) | ||
67 | #define NVGPU_PCI_ENABLE_SLCG BIT(1) | ||
68 | #define NVGPU_PCI_ENABLE_ELCG BIT(2) | ||
69 | |||
66 | static struct pci_device_id nvgpu_pci_table[] = { | 70 | static struct pci_device_id nvgpu_pci_table[] = { |
67 | { | 71 | { |
68 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c36), | 72 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c36), |
69 | .class = PCI_BASE_CLASS_DISPLAY << 16, | 73 | .class = PCI_BASE_CLASS_DISPLAY << 16, |
70 | .class_mask = 0xff << 16, | 74 | .class_mask = 0xff << 16, |
75 | .driver_data = NVGPU_PCI_ENABLE_BLCG | | ||
76 | NVGPU_PCI_ENABLE_SLCG, | ||
71 | }, | 77 | }, |
72 | { | 78 | { |
73 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c37), | 79 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c37), |
74 | .class = PCI_BASE_CLASS_DISPLAY << 16, | 80 | .class = PCI_BASE_CLASS_DISPLAY << 16, |
75 | .class_mask = 0xff << 16, | 81 | .class_mask = 0xff << 16, |
82 | .driver_data = NVGPU_PCI_ENABLE_BLCG | | ||
83 | NVGPU_PCI_ENABLE_SLCG, | ||
76 | }, | 84 | }, |
77 | {} | 85 | {} |
78 | }; | 86 | }; |
@@ -201,6 +209,13 @@ static int nvgpu_pci_probe(struct pci_dev *pdev, | |||
201 | platform->g = g; | 209 | platform->g = g; |
202 | g->dev = &pdev->dev; | 210 | g->dev = &pdev->dev; |
203 | 211 | ||
212 | if (pent->driver_data & NVGPU_PCI_ENABLE_BLCG) | ||
213 | platform->enable_blcg = true; | ||
214 | if (pent->driver_data & NVGPU_PCI_ENABLE_SLCG) | ||
215 | platform->enable_slcg = true; | ||
216 | if (pent->driver_data & NVGPU_PCI_ENABLE_ELCG) | ||
217 | platform->enable_elcg = true; | ||
218 | |||
204 | err = pci_enable_device(pdev); | 219 | err = pci_enable_device(pdev); |
205 | if (err) | 220 | if (err) |
206 | return err; | 221 | return err; |