gpu: nvgpu: vgpu: add getting constants golden img size and zcull ctx size

JIRA VFND-2103

Change-Id: I180324b36a1c6b39300b92a2cff6448d7665679b
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1190479
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>

2 files changed, 7 insertions, 8 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
index 5477bca0..bb52347f 100644
--- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
@@ -71,15 +71,12 @@ static int vgpu_gr_load_golden_ctx_image(struct gk20a *g,
 int vgpu_gr_init_ctx_state(struct gk20a *g)
 {
         struct gr_gk20a *gr = &g->gr;
+        struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
 
         gk20a_dbg_fn("");
 
-        vgpu_get_attribute(vgpu_get_handle(g),
-                        TEGRA_VGPU_ATTRIB_GOLDEN_CTX_SIZE,
-                        &g->gr.ctx_vars.golden_image_size);
-        vgpu_get_attribute(vgpu_get_handle(g),
-                        TEGRA_VGPU_ATTRIB_ZCULL_CTX_SIZE,
-                        &g->gr.ctx_vars.zcull_ctxsw_image_size);
+        g->gr.ctx_vars.golden_image_size = priv->constants.golden_ctx_size;
+        g->gr.ctx_vars.zcull_ctxsw_image_size = priv->constants.zcull_ctx_size;
         if (!g->gr.ctx_vars.golden_image_size ||
                 !g->gr.ctx_vars.zcull_ctxsw_image_size)
                 return -ENXIO;
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h
index 04bb65b3..504a31ad 100644
--- a/include/linux/tegra_vgpu.h
+++ b/include/linux/tegra_vgpu.h
@@ -112,8 +112,8 @@ struct tegra_vgpu_channel_hwctx_params {
 
 enum {
         TEGRA_VGPU_ATTRIB_NUM_CHANNELS = 0, /*deprecated */
-        TEGRA_VGPU_ATTRIB_GOLDEN_CTX_SIZE = 1,
-        TEGRA_VGPU_ATTRIB_ZCULL_CTX_SIZE = 2,
+        TEGRA_VGPU_ATTRIB_GOLDEN_CTX_SIZE = 1, /* deprecated */
+        TEGRA_VGPU_ATTRIB_ZCULL_CTX_SIZE = 2, /* deprecated */
         TEGRA_VGPU_ATTRIB_COMPTAG_LINES = 3,
         TEGRA_VGPU_ATTRIB_GPC_COUNT = 4,
         TEGRA_VGPU_ATTRIB_MAX_TPC_PER_GPC_COUNT = 5,
@@ -409,6 +409,8 @@ struct tegra_vgpu_constants_params {
         u32 rev;
         u32 max_freq;
         u32 num_channels;
+        u32 golden_ctx_size;
+        u32 zcull_ctx_size;
 };
 
 struct tegra_vgpu_cmd_msg {