diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-11-10 14:38:41 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-11-16 17:45:50 -0500 |
commit | 4387f75f67c5dd502f71b5a0c3421c050954f5b4 (patch) | |
tree | fe28f36e014c5d5f84d16a70d3be5b2fd59b0e63 | |
parent | 463c6f4c74e6deaffbfb6cfc535c521ce4302297 (diff) |
gpu: nvgpu: Change reg_op_is_* into normal funcs
reg_op_is_* static inline force a dependency to UAPI in
regops_gk20a.h. Change the implementation to be functions
in .c file.
JIRA NVGPU-388
Change-Id: If5cae1ad011a26ee5ff23e1e39aac3d88fd5bb98
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1598979
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/regops_gk20a.c | 16 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/regops_gk20a.h | 17 |
2 files changed, 18 insertions, 15 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c index e7aeaa54..f0cf5205 100644 --- a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c | |||
@@ -734,3 +734,19 @@ bool is_bar0_global_offset_whitelisted_gk20a(struct gk20a *g, u32 offset) | |||
734 | regop_bsearch_range_cmp); | 734 | regop_bsearch_range_cmp); |
735 | return valid; | 735 | return valid; |
736 | } | 736 | } |
737 | |||
738 | bool reg_op_is_gr_ctx(u8 type) | ||
739 | { | ||
740 | return type == REGOP(TYPE_GR_CTX) || | ||
741 | type == REGOP(TYPE_GR_CTX_TPC) || | ||
742 | type == REGOP(TYPE_GR_CTX_SM) || | ||
743 | type == REGOP(TYPE_GR_CTX_CROP) || | ||
744 | type == REGOP(TYPE_GR_CTX_ZROP) || | ||
745 | type == REGOP(TYPE_GR_CTX_QUAD); | ||
746 | } | ||
747 | |||
748 | bool reg_op_is_read(u8 op) | ||
749 | { | ||
750 | return op == REGOP(READ_32) || | ||
751 | op == REGOP(READ_64); | ||
752 | } | ||
diff --git a/drivers/gpu/nvgpu/gk20a/regops_gk20a.h b/drivers/gpu/nvgpu/gk20a/regops_gk20a.h index e0496a75..4db79397 100644 --- a/drivers/gpu/nvgpu/gk20a/regops_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/regops_gk20a.h | |||
@@ -36,21 +36,8 @@ int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s, | |||
36 | /* turn seriously unwieldy names -> something shorter */ | 36 | /* turn seriously unwieldy names -> something shorter */ |
37 | #define REGOP(x) NVGPU_DBG_GPU_REG_OP_##x | 37 | #define REGOP(x) NVGPU_DBG_GPU_REG_OP_##x |
38 | 38 | ||
39 | static inline bool reg_op_is_gr_ctx(u8 type) | 39 | bool reg_op_is_gr_ctx(u8 type); |
40 | { | 40 | bool reg_op_is_read(u8 op); |
41 | return type == REGOP(TYPE_GR_CTX) || | ||
42 | type == REGOP(TYPE_GR_CTX_TPC) || | ||
43 | type == REGOP(TYPE_GR_CTX_SM) || | ||
44 | type == REGOP(TYPE_GR_CTX_CROP) || | ||
45 | type == REGOP(TYPE_GR_CTX_ZROP) || | ||
46 | type == REGOP(TYPE_GR_CTX_QUAD); | ||
47 | } | ||
48 | static inline bool reg_op_is_read(u8 op) | ||
49 | { | ||
50 | return op == REGOP(READ_32) || | ||
51 | op == REGOP(READ_64) ; | ||
52 | } | ||
53 | |||
54 | bool is_bar0_global_offset_whitelisted_gk20a(struct gk20a *g, u32 offset); | 41 | bool is_bar0_global_offset_whitelisted_gk20a(struct gk20a *g, u32 offset); |
55 | 42 | ||
56 | #endif /* REGOPS_GK20A_H */ | 43 | #endif /* REGOPS_GK20A_H */ |