diff options
author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2016-12-02 13:45:09 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-12-21 15:38:20 -0500 |
commit | 35969806d2c763d4a5662ba6a9233a63aa00352d (patch) | |
tree | fe639b074b5d4e02a1f0e5cf42af286bbd9e4c7a | |
parent | 67b54c3c76cfa488e1d102e5c74a32b3aaba9287 (diff) |
gpu: nvgpu: gv11b: add clock gating prod settings
JIRA GV11B-15
Change-Id: I38d8cbda33f9c4e8b44ca227cd5ea5fef346bfbd
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1266705
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/Makefile | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c | 648 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.h | 93 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 54 |
4 files changed, 796 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index c059e464..4f7b5422 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile | |||
@@ -5,6 +5,7 @@ nvgpu-y += \ | |||
5 | $(nvgpu-t19x)/gv11b/mc_gv11b.o \ | 5 | $(nvgpu-t19x)/gv11b/mc_gv11b.o \ |
6 | $(nvgpu-t19x)/gv11b/ltc_gv11b.o \ | 6 | $(nvgpu-t19x)/gv11b/ltc_gv11b.o \ |
7 | $(nvgpu-t19x)/gv11b/hal_gv11b.o \ | 7 | $(nvgpu-t19x)/gv11b/hal_gv11b.o \ |
8 | $(nvgpu-t19x)/gv11b/gv11b_gating_reglist.o \ | ||
8 | $(nvgpu-t19x)/gv11b/gr_gv11b.o \ | 9 | $(nvgpu-t19x)/gv11b/gr_gv11b.o \ |
9 | $(nvgpu-t19x)/gv11b/fecs_trace_gv11b.o \ | 10 | $(nvgpu-t19x)/gv11b/fecs_trace_gv11b.o \ |
10 | $(nvgpu-t19x)/gv11b/fb_gv11b.o \ | 11 | $(nvgpu-t19x)/gv11b/fb_gv11b.o \ |
diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c new file mode 100644 index 00000000..9bd40eff --- /dev/null +++ b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c | |||
@@ -0,0 +1,648 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License along | ||
14 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
15 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
16 | * | ||
17 | * This file is autogenerated. Do not edit. | ||
18 | */ | ||
19 | |||
20 | #ifndef __gv11b_gating_reglist_h__ | ||
21 | #define __gv11b_gating_reglist_h__ | ||
22 | |||
23 | #include <linux/types.h> | ||
24 | #include "gv11b_gating_reglist.h" | ||
25 | |||
26 | struct gating_desc { | ||
27 | u32 addr; | ||
28 | u32 prod; | ||
29 | u32 disable; | ||
30 | }; | ||
31 | /* slcg bus */ | ||
32 | static const struct gating_desc gv11b_slcg_bus[] = { | ||
33 | {.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000003fe}, | ||
34 | }; | ||
35 | |||
36 | /* slcg ce2 */ | ||
37 | static const struct gating_desc gv11b_slcg_ce2[] = { | ||
38 | {.addr = 0x00104204, .prod = 0x00000000, .disable = 0x000007fe}, | ||
39 | }; | ||
40 | |||
41 | /* slcg chiplet */ | ||
42 | static const struct gating_desc gv11b_slcg_chiplet[] = { | ||
43 | {.addr = 0x0010c07c, .prod = 0x00000000, .disable = 0x00000007}, | ||
44 | {.addr = 0x0010e07c, .prod = 0x00000000, .disable = 0x00000007}, | ||
45 | {.addr = 0x0010d07c, .prod = 0x00000000, .disable = 0x00000007}, | ||
46 | {.addr = 0x0010e17c, .prod = 0x00000000, .disable = 0x00000007}, | ||
47 | }; | ||
48 | |||
49 | /* slcg fb */ | ||
50 | static const struct gating_desc gv11b_slcg_fb[] = { | ||
51 | {.addr = 0x00100d14, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
52 | {.addr = 0x00100c9c, .prod = 0x00000000, .disable = 0x000001fe}, | ||
53 | {.addr = 0x001facb4, .prod = 0x00000000, .disable = 0x000001fe}, | ||
54 | }; | ||
55 | |||
56 | /* slcg fifo */ | ||
57 | static const struct gating_desc gv11b_slcg_fifo[] = { | ||
58 | {.addr = 0x000026ec, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
59 | }; | ||
60 | |||
61 | /* slcg gr */ | ||
62 | static const struct gating_desc gv11b_slcg_gr[] = { | ||
63 | {.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x07fffffe}, | ||
64 | {.addr = 0x0040917c, .prod = 0x00020008, .disable = 0x0003fffe}, | ||
65 | {.addr = 0x00409894, .prod = 0x00000000, .disable = 0x0000fffe}, | ||
66 | {.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe}, | ||
67 | {.addr = 0x00406004, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
68 | {.addr = 0x00405864, .prod = 0x00000000, .disable = 0x000001fe}, | ||
69 | {.addr = 0x00405910, .prod = 0xfffffff0, .disable = 0xfffffffe}, | ||
70 | {.addr = 0x00408044, .prod = 0x00000000, .disable = 0x000007fe}, | ||
71 | {.addr = 0x00407004, .prod = 0x00000000, .disable = 0x000001fe}, | ||
72 | {.addr = 0x00405bf4, .prod = 0x00000000, .disable = 0x00000002}, | ||
73 | {.addr = 0x0041a17c, .prod = 0x00020008, .disable = 0x0003fffe}, | ||
74 | {.addr = 0x0041a894, .prod = 0x00000000, .disable = 0x0000fffe}, | ||
75 | {.addr = 0x00418504, .prod = 0x00000000, .disable = 0x0007fffe}, | ||
76 | {.addr = 0x0041860c, .prod = 0x00000000, .disable = 0x000001fe}, | ||
77 | {.addr = 0x0041868c, .prod = 0x00000000, .disable = 0x0000001e}, | ||
78 | {.addr = 0x0041871c, .prod = 0x00000000, .disable = 0x000003fe}, | ||
79 | {.addr = 0x00418388, .prod = 0x00000000, .disable = 0x00000001}, | ||
80 | {.addr = 0x0041882c, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
81 | {.addr = 0x00418bc0, .prod = 0x00000000, .disable = 0x000001fe}, | ||
82 | {.addr = 0x00418974, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
83 | {.addr = 0x00418c74, .prod = 0xffffff80, .disable = 0xfffffffe}, | ||
84 | {.addr = 0x00418cf4, .prod = 0xfffffff8, .disable = 0xfffffffe}, | ||
85 | {.addr = 0x00418d74, .prod = 0xffffffe0, .disable = 0xfffffffe}, | ||
86 | {.addr = 0x00418f10, .prod = 0xffffffe0, .disable = 0xfffffffe}, | ||
87 | {.addr = 0x00418e10, .prod = 0xfffffffe, .disable = 0xfffffffe}, | ||
88 | {.addr = 0x00419024, .prod = 0x000001fe, .disable = 0x000001fe}, | ||
89 | {.addr = 0x0041889c, .prod = 0x00000000, .disable = 0x000001fe}, | ||
90 | {.addr = 0x00419d24, .prod = 0x00000000, .disable = 0x000000ff}, | ||
91 | {.addr = 0x0041986c, .prod = 0x00000104, .disable = 0x00fffffe}, | ||
92 | {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e}, | ||
93 | {.addr = 0x00419c84, .prod = 0x0003fffe, .disable = 0x0003fffe}, | ||
94 | {.addr = 0x00419c8c, .prod = 0xffffff84, .disable = 0xfffffffe}, | ||
95 | {.addr = 0x00419c94, .prod = 0x00007ffe, .disable = 0x00007ffe}, | ||
96 | {.addr = 0x00419ca4, .prod = 0x00003ffe, .disable = 0x00003ffe}, | ||
97 | {.addr = 0x00419cac, .prod = 0x0001fffe, .disable = 0x0001fffe}, | ||
98 | {.addr = 0x00419a44, .prod = 0x00000000, .disable = 0x0000000e}, | ||
99 | {.addr = 0x00419a4c, .prod = 0x00000000, .disable = 0x000001fe}, | ||
100 | {.addr = 0x00419a54, .prod = 0x00000000, .disable = 0x0000003e}, | ||
101 | {.addr = 0x00419a5c, .prod = 0x00000000, .disable = 0x0000000e}, | ||
102 | {.addr = 0x00419a64, .prod = 0x00000000, .disable = 0x000001fe}, | ||
103 | {.addr = 0x00419a7c, .prod = 0x00000000, .disable = 0x0000003e}, | ||
104 | {.addr = 0x00419a84, .prod = 0x00000000, .disable = 0x0000000e}, | ||
105 | {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, | ||
106 | {.addr = 0x0041bfec, .prod = 0xfffffff0, .disable = 0xfffffffe}, | ||
107 | {.addr = 0x0041bed4, .prod = 0xfffffff8, .disable = 0xfffffffe}, | ||
108 | {.addr = 0x00408814, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
109 | {.addr = 0x00408a84, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
110 | {.addr = 0x004089ac, .prod = 0x00000000, .disable = 0x0001fffe}, | ||
111 | {.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x000000ff}, | ||
112 | }; | ||
113 | |||
114 | /* slcg ltc */ | ||
115 | static const struct gating_desc gv11b_slcg_ltc[] = { | ||
116 | {.addr = 0x0017e050, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
117 | {.addr = 0x0017e35c, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
118 | }; | ||
119 | |||
120 | /* slcg perf */ | ||
121 | static const struct gating_desc gv11b_slcg_perf[] = { | ||
122 | {.addr = 0x00248018, .prod = 0xffffffff, .disable = 0x00000000}, | ||
123 | {.addr = 0x00248018, .prod = 0xffffffff, .disable = 0x00000000}, | ||
124 | {.addr = 0x00246018, .prod = 0xffffffff, .disable = 0x00000000}, | ||
125 | {.addr = 0x00246018, .prod = 0xffffffff, .disable = 0x00000000}, | ||
126 | {.addr = 0x00246018, .prod = 0xffffffff, .disable = 0x00000000}, | ||
127 | {.addr = 0x00244018, .prod = 0xffffffff, .disable = 0x00000000}, | ||
128 | {.addr = 0x00244018, .prod = 0xffffffff, .disable = 0x00000000}, | ||
129 | {.addr = 0x00244018, .prod = 0xffffffff, .disable = 0x00000000}, | ||
130 | {.addr = 0x0024a124, .prod = 0x00000001, .disable = 0x00000000}, | ||
131 | }; | ||
132 | |||
133 | /* slcg PriRing */ | ||
134 | static const struct gating_desc gv11b_slcg_priring[] = { | ||
135 | {.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001}, | ||
136 | }; | ||
137 | |||
138 | /* slcg pwr_csb */ | ||
139 | static const struct gating_desc gv11b_slcg_pwr_csb[] = { | ||
140 | {.addr = 0x00000134, .prod = 0x00020008, .disable = 0x0003fffe}, | ||
141 | {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f}, | ||
142 | {.addr = 0x00000a74, .prod = 0x00000000, .disable = 0x00007ffe}, | ||
143 | {.addr = 0x000016b8, .prod = 0x00000000, .disable = 0x0000000f}, | ||
144 | }; | ||
145 | |||
146 | /* slcg pmu */ | ||
147 | static const struct gating_desc gv11b_slcg_pmu[] = { | ||
148 | {.addr = 0x0010a134, .prod = 0x00020008, .disable = 0x0003fffe}, | ||
149 | {.addr = 0x0010aa74, .prod = 0x00000000, .disable = 0x00007ffe}, | ||
150 | {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f}, | ||
151 | }; | ||
152 | |||
153 | /* therm gr */ | ||
154 | static const struct gating_desc gv11b_slcg_therm[] = { | ||
155 | {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f}, | ||
156 | }; | ||
157 | |||
158 | /* slcg Xbar */ | ||
159 | static const struct gating_desc gv11b_slcg_xbar[] = { | ||
160 | {.addr = 0x0013c824, .prod = 0x00000000, .disable = 0x7ffffffe}, | ||
161 | {.addr = 0x0013dc08, .prod = 0x00000000, .disable = 0xfffffffe}, | ||
162 | {.addr = 0x0013c924, .prod = 0x00000000, .disable = 0x7ffffffe}, | ||
163 | {.addr = 0x0013cbe4, .prod = 0x00000000, .disable = 0x1ffffffe}, | ||
164 | {.addr = 0x0013cc04, .prod = 0x00000000, .disable = 0x1ffffffe}, | ||
165 | }; | ||
166 | |||
167 | /* blcg bus */ | ||
168 | static const struct gating_desc gv11b_blcg_bus[] = { | ||
169 | {.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000}, | ||
170 | }; | ||
171 | |||
172 | /* blcg ce */ | ||
173 | static const struct gating_desc gv11b_blcg_ce[] = { | ||
174 | {.addr = 0x00104200, .prod = 0x0000c242, .disable = 0x00000000}, | ||
175 | }; | ||
176 | |||
177 | /* blcg ctxsw prog */ | ||
178 | static const struct gating_desc gv11b_blcg_ctxsw_prog[] = { | ||
179 | }; | ||
180 | |||
181 | /* blcg fb */ | ||
182 | static const struct gating_desc gv11b_blcg_fb[] = { | ||
183 | {.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000}, | ||
184 | {.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000}, | ||
185 | {.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000}, | ||
186 | {.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000}, | ||
187 | {.addr = 0x00100d1c, .prod = 0x00000042, .disable = 0x00000000}, | ||
188 | {.addr = 0x00100c98, .prod = 0x00004242, .disable = 0x00000000}, | ||
189 | {.addr = 0x001facb0, .prod = 0x00004242, .disable = 0x00000000}, | ||
190 | }; | ||
191 | |||
192 | /* blcg fifo */ | ||
193 | static const struct gating_desc gv11b_blcg_fifo[] = { | ||
194 | {.addr = 0x000026e0, .prod = 0x0000c242, .disable = 0x00000000}, | ||
195 | }; | ||
196 | |||
197 | /* blcg gr */ | ||
198 | static const struct gating_desc gv11b_blcg_gr[] = { | ||
199 | {.addr = 0x004041f0, .prod = 0x0000c646, .disable = 0x00000000}, | ||
200 | {.addr = 0x00409890, .prod = 0x0000007f, .disable = 0x00000000}, | ||
201 | {.addr = 0x004098b0, .prod = 0x0000007f, .disable = 0x00000000}, | ||
202 | {.addr = 0x004078c0, .prod = 0x00004242, .disable = 0x00000000}, | ||
203 | {.addr = 0x00406000, .prod = 0x0000c444, .disable = 0x00000000}, | ||
204 | {.addr = 0x00405860, .prod = 0x0000c242, .disable = 0x00000000}, | ||
205 | {.addr = 0x0040590c, .prod = 0x0000c444, .disable = 0x00000000}, | ||
206 | {.addr = 0x00408040, .prod = 0x0000c444, .disable = 0x00000000}, | ||
207 | {.addr = 0x00407000, .prod = 0x4000c242, .disable = 0x00000000}, | ||
208 | {.addr = 0x00405bf0, .prod = 0x0000c444, .disable = 0x00000000}, | ||
209 | {.addr = 0x0041a890, .prod = 0x0000427f, .disable = 0x00000000}, | ||
210 | {.addr = 0x0041a8b0, .prod = 0x0000007f, .disable = 0x00000000}, | ||
211 | {.addr = 0x00418500, .prod = 0x0000c244, .disable = 0x00000000}, | ||
212 | {.addr = 0x00418608, .prod = 0x0000c242, .disable = 0x00000000}, | ||
213 | {.addr = 0x00418688, .prod = 0x0000c242, .disable = 0x00000000}, | ||
214 | {.addr = 0x00418718, .prod = 0x00000042, .disable = 0x00000000}, | ||
215 | {.addr = 0x00418828, .prod = 0x00008444, .disable = 0x00000000}, | ||
216 | {.addr = 0x00418bbc, .prod = 0x0000c242, .disable = 0x00000000}, | ||
217 | {.addr = 0x00418970, .prod = 0x0000c242, .disable = 0x00000000}, | ||
218 | {.addr = 0x00418c70, .prod = 0x0000c444, .disable = 0x00000000}, | ||
219 | {.addr = 0x00418cf0, .prod = 0x0000c444, .disable = 0x00000000}, | ||
220 | {.addr = 0x00418d70, .prod = 0x0000c444, .disable = 0x00000000}, | ||
221 | {.addr = 0x00418f0c, .prod = 0x0000c444, .disable = 0x00000000}, | ||
222 | {.addr = 0x00418e0c, .prod = 0x0000c444, .disable = 0x00000000}, | ||
223 | {.addr = 0x00419020, .prod = 0x0000c242, .disable = 0x00000000}, | ||
224 | {.addr = 0x00419038, .prod = 0x00000042, .disable = 0x00000000}, | ||
225 | {.addr = 0x00418898, .prod = 0x00004242, .disable = 0x00000000}, | ||
226 | {.addr = 0x00419868, .prod = 0x00008242, .disable = 0x00000000}, | ||
227 | {.addr = 0x00419c70, .prod = 0x0000c444, .disable = 0x00000000}, | ||
228 | {.addr = 0x00419c80, .prod = 0x00000003, .disable = 0x00000000}, | ||
229 | {.addr = 0x00419c88, .prod = 0x00000003, .disable = 0x00000000}, | ||
230 | {.addr = 0x00419c90, .prod = 0x00000003, .disable = 0x00000000}, | ||
231 | {.addr = 0x00419c98, .prod = 0x00000042, .disable = 0x00000000}, | ||
232 | {.addr = 0x00419ca0, .prod = 0x00000043, .disable = 0x00000000}, | ||
233 | {.addr = 0x00419ca8, .prod = 0x00000003, .disable = 0x00000000}, | ||
234 | {.addr = 0x00419cb0, .prod = 0x00000002, .disable = 0x00000000}, | ||
235 | {.addr = 0x00419a40, .prod = 0x00000202, .disable = 0x00000000}, | ||
236 | {.addr = 0x00419a48, .prod = 0x00000202, .disable = 0x00000000}, | ||
237 | {.addr = 0x00419a50, .prod = 0x00000202, .disable = 0x00000000}, | ||
238 | {.addr = 0x00419a58, .prod = 0x00000202, .disable = 0x00000000}, | ||
239 | {.addr = 0x00419a60, .prod = 0x00000202, .disable = 0x00000000}, | ||
240 | {.addr = 0x00419a68, .prod = 0x00000202, .disable = 0x00000000}, | ||
241 | {.addr = 0x00419a78, .prod = 0x00000202, .disable = 0x00000000}, | ||
242 | {.addr = 0x00419a80, .prod = 0x00000202, .disable = 0x00000000}, | ||
243 | {.addr = 0x0041be28, .prod = 0x00008242, .disable = 0x00000000}, | ||
244 | {.addr = 0x0041bfe8, .prod = 0x0000c444, .disable = 0x00000000}, | ||
245 | {.addr = 0x0041bed0, .prod = 0x0000c444, .disable = 0x00000000}, | ||
246 | {.addr = 0x00408810, .prod = 0x0000c242, .disable = 0x00000000}, | ||
247 | {.addr = 0x00408a80, .prod = 0x0000c242, .disable = 0x00000000}, | ||
248 | {.addr = 0x004089a8, .prod = 0x0000c242, .disable = 0x00000000}, | ||
249 | }; | ||
250 | |||
251 | /* blcg ltc */ | ||
252 | static const struct gating_desc gv11b_blcg_ltc[] = { | ||
253 | {.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000}, | ||
254 | {.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000}, | ||
255 | {.addr = 0x0017e3e0, .prod = 0x00000044, .disable = 0x00000000}, | ||
256 | {.addr = 0x0017e3c8, .prod = 0x00000044, .disable = 0x00000000}, | ||
257 | }; | ||
258 | |||
259 | /* blcg pwr_csb */ | ||
260 | static const struct gating_desc gv11b_blcg_pwr_csb[] = { | ||
261 | {.addr = 0x00000a70, .prod = 0x00000045, .disable = 0x00000000}, | ||
262 | }; | ||
263 | |||
264 | /* blcg pmu */ | ||
265 | static const struct gating_desc gv11b_blcg_pmu[] = { | ||
266 | {.addr = 0x0010aa70, .prod = 0x00000045, .disable = 0x00000000}, | ||
267 | }; | ||
268 | |||
269 | /* blcg Xbar */ | ||
270 | static const struct gating_desc gv11b_blcg_xbar[] = { | ||
271 | {.addr = 0x0013c820, .prod = 0x0001004a, .disable = 0x00000000}, | ||
272 | {.addr = 0x0013dc04, .prod = 0x0001004a, .disable = 0x00000000}, | ||
273 | {.addr = 0x0013c920, .prod = 0x0000004a, .disable = 0x00000000}, | ||
274 | {.addr = 0x0013cbe0, .prod = 0x00000042, .disable = 0x00000000}, | ||
275 | {.addr = 0x0013cc00, .prod = 0x00000042, .disable = 0x00000000}, | ||
276 | }; | ||
277 | |||
278 | /* pg gr */ | ||
279 | static const struct gating_desc gv11b_pg_gr[] = { | ||
280 | }; | ||
281 | |||
282 | /* inline functions */ | ||
283 | void gv11b_slcg_bus_load_gating_prod(struct gk20a *g, | ||
284 | bool prod) | ||
285 | { | ||
286 | u32 i; | ||
287 | u32 size = sizeof(gv11b_slcg_bus) / sizeof(struct gating_desc); | ||
288 | for (i = 0; i < size; i++) { | ||
289 | if (prod) | ||
290 | gk20a_writel(g, gv11b_slcg_bus[i].addr, | ||
291 | gv11b_slcg_bus[i].prod); | ||
292 | else | ||
293 | gk20a_writel(g, gv11b_slcg_bus[i].addr, | ||
294 | gv11b_slcg_bus[i].disable); | ||
295 | } | ||
296 | } | ||
297 | |||
298 | void gv11b_slcg_ce2_load_gating_prod(struct gk20a *g, | ||
299 | bool prod) | ||
300 | { | ||
301 | u32 i; | ||
302 | u32 size = sizeof(gv11b_slcg_ce2) / sizeof(struct gating_desc); | ||
303 | for (i = 0; i < size; i++) { | ||
304 | if (prod) | ||
305 | gk20a_writel(g, gv11b_slcg_ce2[i].addr, | ||
306 | gv11b_slcg_ce2[i].prod); | ||
307 | else | ||
308 | gk20a_writel(g, gv11b_slcg_ce2[i].addr, | ||
309 | gv11b_slcg_ce2[i].disable); | ||
310 | } | ||
311 | } | ||
312 | |||
313 | void gv11b_slcg_chiplet_load_gating_prod(struct gk20a *g, | ||
314 | bool prod) | ||
315 | { | ||
316 | u32 i; | ||
317 | u32 size = sizeof(gv11b_slcg_chiplet) / sizeof(struct gating_desc); | ||
318 | for (i = 0; i < size; i++) { | ||
319 | if (prod) | ||
320 | gk20a_writel(g, gv11b_slcg_chiplet[i].addr, | ||
321 | gv11b_slcg_chiplet[i].prod); | ||
322 | else | ||
323 | gk20a_writel(g, gv11b_slcg_chiplet[i].addr, | ||
324 | gv11b_slcg_chiplet[i].disable); | ||
325 | } | ||
326 | } | ||
327 | |||
328 | void gv11b_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, | ||
329 | bool prod) | ||
330 | { | ||
331 | } | ||
332 | |||
333 | void gv11b_slcg_fb_load_gating_prod(struct gk20a *g, | ||
334 | bool prod) | ||
335 | { | ||
336 | u32 i; | ||
337 | u32 size = sizeof(gv11b_slcg_fb) / sizeof(struct gating_desc); | ||
338 | for (i = 0; i < size; i++) { | ||
339 | if (prod) | ||
340 | gk20a_writel(g, gv11b_slcg_fb[i].addr, | ||
341 | gv11b_slcg_fb[i].prod); | ||
342 | else | ||
343 | gk20a_writel(g, gv11b_slcg_fb[i].addr, | ||
344 | gv11b_slcg_fb[i].disable); | ||
345 | } | ||
346 | } | ||
347 | |||
348 | void gv11b_slcg_fifo_load_gating_prod(struct gk20a *g, | ||
349 | bool prod) | ||
350 | { | ||
351 | u32 i; | ||
352 | u32 size = sizeof(gv11b_slcg_fifo) / sizeof(struct gating_desc); | ||
353 | for (i = 0; i < size; i++) { | ||
354 | if (prod) | ||
355 | gk20a_writel(g, gv11b_slcg_fifo[i].addr, | ||
356 | gv11b_slcg_fifo[i].prod); | ||
357 | else | ||
358 | gk20a_writel(g, gv11b_slcg_fifo[i].addr, | ||
359 | gv11b_slcg_fifo[i].disable); | ||
360 | } | ||
361 | } | ||
362 | |||
363 | void gr_gv11b_slcg_gr_load_gating_prod(struct gk20a *g, | ||
364 | bool prod) | ||
365 | { | ||
366 | u32 i; | ||
367 | u32 size = sizeof(gv11b_slcg_gr) / sizeof(struct gating_desc); | ||
368 | for (i = 0; i < size; i++) { | ||
369 | if (prod) | ||
370 | gk20a_writel(g, gv11b_slcg_gr[i].addr, | ||
371 | gv11b_slcg_gr[i].prod); | ||
372 | else | ||
373 | gk20a_writel(g, gv11b_slcg_gr[i].addr, | ||
374 | gv11b_slcg_gr[i].disable); | ||
375 | } | ||
376 | } | ||
377 | |||
378 | void ltc_gv11b_slcg_ltc_load_gating_prod(struct gk20a *g, | ||
379 | bool prod) | ||
380 | { | ||
381 | u32 i; | ||
382 | u32 size = sizeof(gv11b_slcg_ltc) / sizeof(struct gating_desc); | ||
383 | for (i = 0; i < size; i++) { | ||
384 | if (prod) | ||
385 | gk20a_writel(g, gv11b_slcg_ltc[i].addr, | ||
386 | gv11b_slcg_ltc[i].prod); | ||
387 | else | ||
388 | gk20a_writel(g, gv11b_slcg_ltc[i].addr, | ||
389 | gv11b_slcg_ltc[i].disable); | ||
390 | } | ||
391 | } | ||
392 | |||
393 | void gv11b_slcg_perf_load_gating_prod(struct gk20a *g, | ||
394 | bool prod) | ||
395 | { | ||
396 | u32 i; | ||
397 | u32 size = sizeof(gv11b_slcg_perf) / sizeof(struct gating_desc); | ||
398 | for (i = 0; i < size; i++) { | ||
399 | if (prod) | ||
400 | gk20a_writel(g, gv11b_slcg_perf[i].addr, | ||
401 | gv11b_slcg_perf[i].prod); | ||
402 | else | ||
403 | gk20a_writel(g, gv11b_slcg_perf[i].addr, | ||
404 | gv11b_slcg_perf[i].disable); | ||
405 | } | ||
406 | } | ||
407 | |||
408 | void gv11b_slcg_priring_load_gating_prod(struct gk20a *g, | ||
409 | bool prod) | ||
410 | { | ||
411 | u32 i; | ||
412 | u32 size = sizeof(gv11b_slcg_priring) / sizeof(struct gating_desc); | ||
413 | for (i = 0; i < size; i++) { | ||
414 | if (prod) | ||
415 | gk20a_writel(g, gv11b_slcg_priring[i].addr, | ||
416 | gv11b_slcg_priring[i].prod); | ||
417 | else | ||
418 | gk20a_writel(g, gv11b_slcg_priring[i].addr, | ||
419 | gv11b_slcg_priring[i].disable); | ||
420 | } | ||
421 | } | ||
422 | |||
423 | void gv11b_slcg_pwr_csb_load_gating_prod(struct gk20a *g, | ||
424 | bool prod) | ||
425 | { | ||
426 | u32 i; | ||
427 | u32 size = sizeof(gv11b_slcg_pwr_csb) / sizeof(struct gating_desc); | ||
428 | for (i = 0; i < size; i++) { | ||
429 | if (prod) | ||
430 | gk20a_writel(g, gv11b_slcg_pwr_csb[i].addr, | ||
431 | gv11b_slcg_pwr_csb[i].prod); | ||
432 | else | ||
433 | gk20a_writel(g, gv11b_slcg_pwr_csb[i].addr, | ||
434 | gv11b_slcg_pwr_csb[i].disable); | ||
435 | } | ||
436 | } | ||
437 | |||
438 | void gv11b_slcg_pmu_load_gating_prod(struct gk20a *g, | ||
439 | bool prod) | ||
440 | { | ||
441 | u32 i; | ||
442 | u32 size = sizeof(gv11b_slcg_pmu) / sizeof(struct gating_desc); | ||
443 | for (i = 0; i < size; i++) { | ||
444 | if (prod) | ||
445 | gk20a_writel(g, gv11b_slcg_pmu[i].addr, | ||
446 | gv11b_slcg_pmu[i].prod); | ||
447 | else | ||
448 | gk20a_writel(g, gv11b_slcg_pmu[i].addr, | ||
449 | gv11b_slcg_pmu[i].disable); | ||
450 | } | ||
451 | } | ||
452 | |||
453 | void gv11b_slcg_therm_load_gating_prod(struct gk20a *g, | ||
454 | bool prod) | ||
455 | { | ||
456 | u32 i; | ||
457 | u32 size = sizeof(gv11b_slcg_therm) / sizeof(struct gating_desc); | ||
458 | for (i = 0; i < size; i++) { | ||
459 | if (prod) | ||
460 | gk20a_writel(g, gv11b_slcg_therm[i].addr, | ||
461 | gv11b_slcg_therm[i].prod); | ||
462 | else | ||
463 | gk20a_writel(g, gv11b_slcg_therm[i].addr, | ||
464 | gv11b_slcg_therm[i].disable); | ||
465 | } | ||
466 | } | ||
467 | |||
468 | void gv11b_slcg_xbar_load_gating_prod(struct gk20a *g, | ||
469 | bool prod) | ||
470 | { | ||
471 | u32 i; | ||
472 | u32 size = sizeof(gv11b_slcg_xbar) / sizeof(struct gating_desc); | ||
473 | for (i = 0; i < size; i++) { | ||
474 | if (prod) | ||
475 | gk20a_writel(g, gv11b_slcg_xbar[i].addr, | ||
476 | gv11b_slcg_xbar[i].prod); | ||
477 | else | ||
478 | gk20a_writel(g, gv11b_slcg_xbar[i].addr, | ||
479 | gv11b_slcg_xbar[i].disable); | ||
480 | } | ||
481 | } | ||
482 | |||
483 | void gv11b_blcg_bus_load_gating_prod(struct gk20a *g, | ||
484 | bool prod) | ||
485 | { | ||
486 | u32 i; | ||
487 | u32 size = sizeof(gv11b_blcg_bus) / sizeof(struct gating_desc); | ||
488 | for (i = 0; i < size; i++) { | ||
489 | if (prod) | ||
490 | gk20a_writel(g, gv11b_blcg_bus[i].addr, | ||
491 | gv11b_blcg_bus[i].prod); | ||
492 | else | ||
493 | gk20a_writel(g, gv11b_blcg_bus[i].addr, | ||
494 | gv11b_blcg_bus[i].disable); | ||
495 | } | ||
496 | } | ||
497 | |||
498 | void gv11b_blcg_ce_load_gating_prod(struct gk20a *g, | ||
499 | bool prod) | ||
500 | { | ||
501 | u32 i; | ||
502 | u32 size = sizeof(gv11b_blcg_ce) / sizeof(struct gating_desc); | ||
503 | for (i = 0; i < size; i++) { | ||
504 | if (prod) | ||
505 | gk20a_writel(g, gv11b_blcg_ce[i].addr, | ||
506 | gv11b_blcg_ce[i].prod); | ||
507 | else | ||
508 | gk20a_writel(g, gv11b_blcg_ce[i].addr, | ||
509 | gv11b_blcg_ce[i].disable); | ||
510 | } | ||
511 | } | ||
512 | |||
513 | void gv11b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, | ||
514 | bool prod) | ||
515 | { | ||
516 | u32 i; | ||
517 | u32 size = sizeof(gv11b_blcg_ctxsw_prog) / sizeof(struct gating_desc); | ||
518 | for (i = 0; i < size; i++) { | ||
519 | if (prod) | ||
520 | gk20a_writel(g, gv11b_blcg_ctxsw_prog[i].addr, | ||
521 | gv11b_blcg_ctxsw_prog[i].prod); | ||
522 | else | ||
523 | gk20a_writel(g, gv11b_blcg_ctxsw_prog[i].addr, | ||
524 | gv11b_blcg_ctxsw_prog[i].disable); | ||
525 | } | ||
526 | } | ||
527 | |||
528 | void gv11b_blcg_fb_load_gating_prod(struct gk20a *g, | ||
529 | bool prod) | ||
530 | { | ||
531 | u32 i; | ||
532 | u32 size = sizeof(gv11b_blcg_fb) / sizeof(struct gating_desc); | ||
533 | for (i = 0; i < size; i++) { | ||
534 | if (prod) | ||
535 | gk20a_writel(g, gv11b_blcg_fb[i].addr, | ||
536 | gv11b_blcg_fb[i].prod); | ||
537 | else | ||
538 | gk20a_writel(g, gv11b_blcg_fb[i].addr, | ||
539 | gv11b_blcg_fb[i].disable); | ||
540 | } | ||
541 | } | ||
542 | |||
543 | void gv11b_blcg_fifo_load_gating_prod(struct gk20a *g, | ||
544 | bool prod) | ||
545 | { | ||
546 | u32 i; | ||
547 | u32 size = sizeof(gv11b_blcg_fifo) / sizeof(struct gating_desc); | ||
548 | for (i = 0; i < size; i++) { | ||
549 | if (prod) | ||
550 | gk20a_writel(g, gv11b_blcg_fifo[i].addr, | ||
551 | gv11b_blcg_fifo[i].prod); | ||
552 | else | ||
553 | gk20a_writel(g, gv11b_blcg_fifo[i].addr, | ||
554 | gv11b_blcg_fifo[i].disable); | ||
555 | } | ||
556 | } | ||
557 | |||
558 | void gv11b_blcg_gr_load_gating_prod(struct gk20a *g, | ||
559 | bool prod) | ||
560 | { | ||
561 | u32 i; | ||
562 | u32 size = sizeof(gv11b_blcg_gr) / sizeof(struct gating_desc); | ||
563 | for (i = 0; i < size; i++) { | ||
564 | if (prod) | ||
565 | gk20a_writel(g, gv11b_blcg_gr[i].addr, | ||
566 | gv11b_blcg_gr[i].prod); | ||
567 | else | ||
568 | gk20a_writel(g, gv11b_blcg_gr[i].addr, | ||
569 | gv11b_blcg_gr[i].disable); | ||
570 | } | ||
571 | } | ||
572 | |||
573 | void gv11b_blcg_ltc_load_gating_prod(struct gk20a *g, | ||
574 | bool prod) | ||
575 | { | ||
576 | u32 i; | ||
577 | u32 size = sizeof(gv11b_blcg_ltc) / sizeof(struct gating_desc); | ||
578 | for (i = 0; i < size; i++) { | ||
579 | if (prod) | ||
580 | gk20a_writel(g, gv11b_blcg_ltc[i].addr, | ||
581 | gv11b_blcg_ltc[i].prod); | ||
582 | else | ||
583 | gk20a_writel(g, gv11b_blcg_ltc[i].addr, | ||
584 | gv11b_blcg_ltc[i].disable); | ||
585 | } | ||
586 | } | ||
587 | |||
588 | void gv11b_blcg_pwr_csb_load_gating_prod(struct gk20a *g, | ||
589 | bool prod) | ||
590 | { | ||
591 | u32 i; | ||
592 | u32 size = sizeof(gv11b_blcg_pwr_csb) / sizeof(struct gating_desc); | ||
593 | for (i = 0; i < size; i++) { | ||
594 | if (prod) | ||
595 | gk20a_writel(g, gv11b_blcg_pwr_csb[i].addr, | ||
596 | gv11b_blcg_pwr_csb[i].prod); | ||
597 | else | ||
598 | gk20a_writel(g, gv11b_blcg_pwr_csb[i].addr, | ||
599 | gv11b_blcg_pwr_csb[i].disable); | ||
600 | } | ||
601 | } | ||
602 | |||
603 | void gv11b_blcg_pmu_load_gating_prod(struct gk20a *g, | ||
604 | bool prod) | ||
605 | { | ||
606 | u32 i; | ||
607 | u32 size = sizeof(gv11b_blcg_pmu) / sizeof(struct gating_desc); | ||
608 | for (i = 0; i < size; i++) { | ||
609 | if (prod) | ||
610 | gk20a_writel(g, gv11b_blcg_pmu[i].addr, | ||
611 | gv11b_blcg_pmu[i].prod); | ||
612 | else | ||
613 | gk20a_writel(g, gv11b_blcg_pmu[i].addr, | ||
614 | gv11b_blcg_pmu[i].disable); | ||
615 | } | ||
616 | } | ||
617 | |||
618 | void gv11b_blcg_xbar_load_gating_prod(struct gk20a *g, | ||
619 | bool prod) | ||
620 | { | ||
621 | u32 i; | ||
622 | u32 size = sizeof(gv11b_blcg_xbar) / sizeof(struct gating_desc); | ||
623 | for (i = 0; i < size; i++) { | ||
624 | if (prod) | ||
625 | gk20a_writel(g, gv11b_blcg_xbar[i].addr, | ||
626 | gv11b_blcg_xbar[i].prod); | ||
627 | else | ||
628 | gk20a_writel(g, gv11b_blcg_xbar[i].addr, | ||
629 | gv11b_blcg_xbar[i].disable); | ||
630 | } | ||
631 | } | ||
632 | |||
633 | void gr_gv11b_pg_gr_load_gating_prod(struct gk20a *g, | ||
634 | bool prod) | ||
635 | { | ||
636 | u32 i; | ||
637 | u32 size = sizeof(gv11b_pg_gr) / sizeof(struct gating_desc); | ||
638 | for (i = 0; i < size; i++) { | ||
639 | if (prod) | ||
640 | gk20a_writel(g, gv11b_pg_gr[i].addr, | ||
641 | gv11b_pg_gr[i].prod); | ||
642 | else | ||
643 | gk20a_writel(g, gv11b_pg_gr[i].addr, | ||
644 | gv11b_pg_gr[i].disable); | ||
645 | } | ||
646 | } | ||
647 | |||
648 | #endif /* __gv11b_gating_reglist_h__ */ | ||
diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.h b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.h new file mode 100644 index 00000000..ba91a2a7 --- /dev/null +++ b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.h | |||
@@ -0,0 +1,93 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016, NVIDIA Corporation. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #include "gk20a/gk20a.h" | ||
18 | |||
19 | void gv11b_slcg_bus_load_gating_prod(struct gk20a *g, | ||
20 | bool prod); | ||
21 | |||
22 | void gv11b_slcg_ce2_load_gating_prod(struct gk20a *g, | ||
23 | bool prod); | ||
24 | |||
25 | void gv11b_slcg_chiplet_load_gating_prod(struct gk20a *g, | ||
26 | bool prod); | ||
27 | |||
28 | void gv11b_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, | ||
29 | bool prod); | ||
30 | |||
31 | void gv11b_slcg_fb_load_gating_prod(struct gk20a *g, | ||
32 | bool prod); | ||
33 | |||
34 | void gv11b_slcg_fifo_load_gating_prod(struct gk20a *g, | ||
35 | bool prod); | ||
36 | |||
37 | void gr_gv11b_slcg_gr_load_gating_prod(struct gk20a *g, | ||
38 | bool prod); | ||
39 | |||
40 | void ltc_gv11b_slcg_ltc_load_gating_prod(struct gk20a *g, | ||
41 | bool prod); | ||
42 | |||
43 | void gv11b_slcg_perf_load_gating_prod(struct gk20a *g, | ||
44 | bool prod); | ||
45 | |||
46 | void gv11b_slcg_priring_load_gating_prod(struct gk20a *g, | ||
47 | bool prod); | ||
48 | |||
49 | void gv11b_slcg_pwr_csb_load_gating_prod(struct gk20a *g, | ||
50 | bool prod); | ||
51 | |||
52 | void gv11b_slcg_pmu_load_gating_prod(struct gk20a *g, | ||
53 | bool prod); | ||
54 | |||
55 | void gv11b_slcg_therm_load_gating_prod(struct gk20a *g, | ||
56 | bool prod); | ||
57 | |||
58 | void gv11b_slcg_xbar_load_gating_prod(struct gk20a *g, | ||
59 | bool prod); | ||
60 | |||
61 | void gv11b_blcg_bus_load_gating_prod(struct gk20a *g, | ||
62 | bool prod); | ||
63 | |||
64 | void gv11b_blcg_ce_load_gating_prod(struct gk20a *g, | ||
65 | bool prod); | ||
66 | |||
67 | void gv11b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, | ||
68 | bool prod); | ||
69 | |||
70 | void gv11b_blcg_fb_load_gating_prod(struct gk20a *g, | ||
71 | bool prod); | ||
72 | |||
73 | void gv11b_blcg_fifo_load_gating_prod(struct gk20a *g, | ||
74 | bool prod); | ||
75 | |||
76 | void gv11b_blcg_gr_load_gating_prod(struct gk20a *g, | ||
77 | bool prod); | ||
78 | |||
79 | void gv11b_blcg_ltc_load_gating_prod(struct gk20a *g, | ||
80 | bool prod); | ||
81 | |||
82 | void gv11b_blcg_pwr_csb_load_gating_prod(struct gk20a *g, | ||
83 | bool prod); | ||
84 | |||
85 | void gv11b_blcg_pmu_load_gating_prod(struct gk20a *g, | ||
86 | bool prod); | ||
87 | |||
88 | void gv11b_blcg_xbar_load_gating_prod(struct gk20a *g, | ||
89 | bool prod); | ||
90 | |||
91 | void gr_gv11b_pg_gr_load_gating_prod(struct gk20a *g, | ||
92 | bool prod); | ||
93 | |||
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 3124f540..ccaa570c 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -34,12 +34,66 @@ | |||
34 | #include "gv11b/fb_gv11b.h" | 34 | #include "gv11b/fb_gv11b.h" |
35 | #include "gv11b/fifo_gv11b.h" | 35 | #include "gv11b/fifo_gv11b.h" |
36 | #include "gv11b/hw_proj_gv11b.h" | 36 | #include "gv11b/hw_proj_gv11b.h" |
37 | #include "gv11b/gv11b_gating_reglist.h" | ||
37 | 38 | ||
38 | #include "gm20b/gr_gm20b.h" | 39 | #include "gm20b/gr_gm20b.h" |
39 | #include "gk20a/dbg_gpu_gk20a.h" | 40 | #include "gk20a/dbg_gpu_gk20a.h" |
40 | 41 | ||
41 | static struct gpu_ops gv11b_ops; | 42 | static struct gpu_ops gv11b_ops; |
42 | 43 | ||
44 | static struct gpu_ops gv11b_ops = { | ||
45 | .clock_gating = { | ||
46 | .slcg_bus_load_gating_prod = | ||
47 | gv11b_slcg_bus_load_gating_prod, | ||
48 | .slcg_ce2_load_gating_prod = | ||
49 | gv11b_slcg_ce2_load_gating_prod, | ||
50 | .slcg_chiplet_load_gating_prod = | ||
51 | gv11b_slcg_chiplet_load_gating_prod, | ||
52 | .slcg_ctxsw_firmware_load_gating_prod = | ||
53 | gv11b_slcg_ctxsw_firmware_load_gating_prod, | ||
54 | .slcg_fb_load_gating_prod = | ||
55 | gv11b_slcg_fb_load_gating_prod, | ||
56 | .slcg_fifo_load_gating_prod = | ||
57 | gv11b_slcg_fifo_load_gating_prod, | ||
58 | .slcg_gr_load_gating_prod = | ||
59 | gr_gv11b_slcg_gr_load_gating_prod, | ||
60 | .slcg_ltc_load_gating_prod = | ||
61 | ltc_gv11b_slcg_ltc_load_gating_prod, | ||
62 | .slcg_perf_load_gating_prod = | ||
63 | gv11b_slcg_perf_load_gating_prod, | ||
64 | .slcg_priring_load_gating_prod = | ||
65 | gv11b_slcg_priring_load_gating_prod, | ||
66 | .slcg_pmu_load_gating_prod = | ||
67 | gv11b_slcg_pmu_load_gating_prod, | ||
68 | .slcg_therm_load_gating_prod = | ||
69 | gv11b_slcg_therm_load_gating_prod, | ||
70 | .slcg_xbar_load_gating_prod = | ||
71 | gv11b_slcg_xbar_load_gating_prod, | ||
72 | .blcg_bus_load_gating_prod = | ||
73 | gv11b_blcg_bus_load_gating_prod, | ||
74 | .blcg_ce_load_gating_prod = | ||
75 | gv11b_blcg_ce_load_gating_prod, | ||
76 | .blcg_ctxsw_firmware_load_gating_prod = | ||
77 | gv11b_blcg_ctxsw_firmware_load_gating_prod, | ||
78 | .blcg_fb_load_gating_prod = | ||
79 | gv11b_blcg_fb_load_gating_prod, | ||
80 | .blcg_fifo_load_gating_prod = | ||
81 | gv11b_blcg_fifo_load_gating_prod, | ||
82 | .blcg_gr_load_gating_prod = | ||
83 | gv11b_blcg_gr_load_gating_prod, | ||
84 | .blcg_ltc_load_gating_prod = | ||
85 | gv11b_blcg_ltc_load_gating_prod, | ||
86 | .blcg_pwr_csb_load_gating_prod = | ||
87 | gv11b_blcg_pwr_csb_load_gating_prod, | ||
88 | .blcg_pmu_load_gating_prod = | ||
89 | gv11b_blcg_pmu_load_gating_prod, | ||
90 | .blcg_xbar_load_gating_prod = | ||
91 | gv11b_blcg_xbar_load_gating_prod, | ||
92 | .pg_gr_load_gating_prod = | ||
93 | gr_gv11b_pg_gr_load_gating_prod, | ||
94 | } | ||
95 | }; | ||
96 | |||
43 | static int gv11b_get_litter_value(struct gk20a *g, int value) | 97 | static int gv11b_get_litter_value(struct gk20a *g, int value) |
44 | { | 98 | { |
45 | int ret = EINVAL; | 99 | int ret = EINVAL; |