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author | Deepak Nibade <dnibade@nvidia.com> | 2018-04-20 03:55:00 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-04-22 10:33:50 -0400 |
commit | 32f6ffee1379f1458d35c8d74e8516f96a3e390e (patch) | |
tree | ee557cd26bd1a7c2caf9e01c88c84d7d361730f3 | |
parent | ae04f394cf9a82a762a7152747a6bba5be6f5f53 (diff) |
gpu: nvgpu: export gv11b fifo APIs
Export below APIs from fifo_gv11b.h
gv11b_fifo_init_ramfc_eng_method_buffer()
gv11b_userd_writeback_config()
Also move #define PBDMA_SUBDEVICE_ID to header file
Jira NVGPUT-19
Change-Id: I5e3abf02acfe014e39550f236d60d8991a75b4ef
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1699315
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 9 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | 6 |
2 files changed, 8 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index ebe5cf4e..51923636 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | |||
@@ -58,11 +58,6 @@ | |||
58 | #include "gr_gv11b.h" | 58 | #include "gr_gv11b.h" |
59 | #include "mc_gv11b.h" | 59 | #include "mc_gv11b.h" |
60 | 60 | ||
61 | #define PBDMA_SUBDEVICE_ID 1 | ||
62 | |||
63 | static void gv11b_fifo_init_ramfc_eng_method_buffer(struct gk20a *g, | ||
64 | struct channel_gk20a *ch, struct nvgpu_mem *mem); | ||
65 | |||
66 | void gv11b_get_tsg_runlist_entry(struct tsg_gk20a *tsg, u32 *runlist) | 61 | void gv11b_get_tsg_runlist_entry(struct tsg_gk20a *tsg, u32 *runlist) |
67 | { | 62 | { |
68 | 63 | ||
@@ -128,7 +123,7 @@ void gv11b_get_ch_runlist_entry(struct channel_gk20a *c, u32 *runlist) | |||
128 | runlist[0], runlist[1], runlist[2], runlist[3]); | 123 | runlist[0], runlist[1], runlist[2], runlist[3]); |
129 | } | 124 | } |
130 | 125 | ||
131 | static void gv11b_userd_writeback_config(struct gk20a *g) | 126 | void gv11b_userd_writeback_config(struct gk20a *g) |
132 | { | 127 | { |
133 | gk20a_writel(g, fifo_userd_writeback_r(), fifo_userd_writeback_timer_f( | 128 | gk20a_writel(g, fifo_userd_writeback_r(), fifo_userd_writeback_timer_f( |
134 | fifo_userd_writeback_timer_100us_v())); | 129 | fifo_userd_writeback_timer_100us_v())); |
@@ -1567,7 +1562,7 @@ unsigned int gv11b_fifo_handle_pbdma_intr_1(struct gk20a *g, | |||
1567 | return rc_type; | 1562 | return rc_type; |
1568 | } | 1563 | } |
1569 | 1564 | ||
1570 | static void gv11b_fifo_init_ramfc_eng_method_buffer(struct gk20a *g, | 1565 | void gv11b_fifo_init_ramfc_eng_method_buffer(struct gk20a *g, |
1571 | struct channel_gk20a *ch, struct nvgpu_mem *mem) | 1566 | struct channel_gk20a *ch, struct nvgpu_mem *mem) |
1572 | { | 1567 | { |
1573 | struct tsg_gk20a *tsg; | 1568 | struct tsg_gk20a *tsg; |
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h index 2bd82d5f..380db592 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | |||
@@ -25,6 +25,8 @@ | |||
25 | #ifndef FIFO_GV11B_H | 25 | #ifndef FIFO_GV11B_H |
26 | #define FIFO_GV11B_H | 26 | #define FIFO_GV11B_H |
27 | 27 | ||
28 | #define PBDMA_SUBDEVICE_ID 1 | ||
29 | |||
28 | #define FIFO_INVAL_PBDMA_ID ((u32)~0) | 30 | #define FIFO_INVAL_PBDMA_ID ((u32)~0) |
29 | #define FIFO_INVAL_VEID ((u32)~0) | 31 | #define FIFO_INVAL_VEID ((u32)~0) |
30 | 32 | ||
@@ -117,4 +119,8 @@ int gv11b_init_fifo_setup_hw(struct gk20a *g); | |||
117 | 119 | ||
118 | void gv11b_fifo_tsg_verify_status_faulted(struct channel_gk20a *ch); | 120 | void gv11b_fifo_tsg_verify_status_faulted(struct channel_gk20a *ch); |
119 | u32 gv11b_fifo_get_preempt_timeout(struct gk20a *g); | 121 | u32 gv11b_fifo_get_preempt_timeout(struct gk20a *g); |
122 | |||
123 | void gv11b_fifo_init_ramfc_eng_method_buffer(struct gk20a *g, | ||
124 | struct channel_gk20a *ch, struct nvgpu_mem *mem); | ||
125 | void gv11b_userd_writeback_config(struct gk20a *g); | ||
120 | #endif | 126 | #endif |