diff options
author | Sunny He <suhe@nvidia.com> | 2017-06-28 20:41:55 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-24 02:35:04 -0400 |
commit | 2b582c5141752ff272c5d059b56433155bc3985a (patch) | |
tree | 1874c77484fb0bf0e927378940e1a6f140390182 | |
parent | 907fcae63816b68e43e07e3d7abaad87954b8326 (diff) |
gpu: nvgpu: Reorg priv_ring HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
priv_ring sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I9ebf27619f771262e5dc398b1200d6c19d6aef16
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514102
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.h | 4 |
7 files changed, 18 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c index dbab6b4b..ef642416 100644 --- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c | |||
@@ -95,8 +95,3 @@ void gk20a_priv_ring_isr(struct gk20a *g) | |||
95 | if (retry <= 0) | 95 | if (retry <= 0) |
96 | nvgpu_warn(g, "priv ringmaster cmd ack too many retries"); | 96 | nvgpu_warn(g, "priv ringmaster cmd ack too many retries"); |
97 | } | 97 | } |
98 | |||
99 | void gk20a_init_priv_ring(struct gpu_ops *gops) | ||
100 | { | ||
101 | gops->priv_ring.isr = gk20a_priv_ring_isr; | ||
102 | } | ||
diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.h b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.h index 61780288..e6c458a5 100644 --- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.h | |||
@@ -19,6 +19,5 @@ struct gpu_ops; | |||
19 | 19 | ||
20 | void gk20a_priv_ring_isr(struct gk20a *g); | 20 | void gk20a_priv_ring_isr(struct gk20a *g); |
21 | void gk20a_enable_priv_ring(struct gk20a *g); | 21 | void gk20a_enable_priv_ring(struct gk20a *g); |
22 | void gk20a_init_priv_ring(struct gpu_ops *gops); | ||
23 | 22 | ||
24 | #endif /*__PRIV_RING_GK20A_H__*/ | 23 | #endif /*__PRIV_RING_GK20A_H__*/ |
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index fa7cf368..87acb25c 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -256,6 +256,9 @@ static const struct gpu_ops gm20b_ops = { | |||
256 | .falcon = { | 256 | .falcon = { |
257 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, | 257 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, |
258 | }, | 258 | }, |
259 | .priv_ring = { | ||
260 | .isr = gk20a_priv_ring_isr, | ||
261 | }, | ||
259 | .chip_init_gpu_characteristics = gk20a_init_gpu_characteristics, | 262 | .chip_init_gpu_characteristics = gk20a_init_gpu_characteristics, |
260 | .get_litter_value = gm20b_get_litter_value, | 263 | .get_litter_value = gm20b_get_litter_value, |
261 | }; | 264 | }; |
@@ -278,6 +281,8 @@ int gm20b_init_hal(struct gk20a *g) | |||
278 | #endif | 281 | #endif |
279 | gops->falcon = gm20b_ops.falcon; | 282 | gops->falcon = gm20b_ops.falcon; |
280 | 283 | ||
284 | gops->priv_ring = gm20b_ops.priv_ring; | ||
285 | |||
281 | /* Lone functions */ | 286 | /* Lone functions */ |
282 | gops->chip_init_gpu_characteristics = | 287 | gops->chip_init_gpu_characteristics = |
283 | gm20b_ops.chip_init_gpu_characteristics; | 288 | gm20b_ops.chip_init_gpu_characteristics; |
@@ -312,9 +317,7 @@ int gm20b_init_hal(struct gk20a *g) | |||
312 | } | 317 | } |
313 | } | 318 | } |
314 | #endif | 319 | #endif |
315 | |||
316 | g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; | 320 | g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; |
317 | gk20a_init_priv_ring(gops); | ||
318 | gm20b_init_gr(gops); | 321 | gm20b_init_gr(gops); |
319 | gm20b_init_fb(gops); | 322 | gm20b_init_fb(gops); |
320 | gm20b_init_fifo(gops); | 323 | gm20b_init_fifo(gops); |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index dde0468a..1690c42b 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -314,6 +314,9 @@ static const struct gpu_ops gp106_ops = { | |||
314 | .falcon = { | 314 | .falcon = { |
315 | .falcon_hal_sw_init = gp106_falcon_hal_sw_init, | 315 | .falcon_hal_sw_init = gp106_falcon_hal_sw_init, |
316 | }, | 316 | }, |
317 | .priv_ring = { | ||
318 | .isr = gp10b_priv_ring_isr, | ||
319 | }, | ||
317 | .get_litter_value = gp106_get_litter_value, | 320 | .get_litter_value = gp106_get_litter_value, |
318 | .chip_init_gpu_characteristics = gp106_init_gpu_characteristics, | 321 | .chip_init_gpu_characteristics = gp106_init_gpu_characteristics, |
319 | .bios_init = gm206_bios_init, | 322 | .bios_init = gm206_bios_init, |
@@ -338,6 +341,7 @@ int gp106_init_hal(struct gk20a *g) | |||
338 | #endif | 341 | #endif |
339 | gops->xve = gp106_ops.xve; | 342 | gops->xve = gp106_ops.xve; |
340 | gops->falcon = gp106_ops.falcon; | 343 | gops->falcon = gp106_ops.falcon; |
344 | gops->priv_ring = gp106_ops.priv_ring; | ||
341 | 345 | ||
342 | /* Lone functions */ | 346 | /* Lone functions */ |
343 | gops->get_litter_value = gp106_ops.get_litter_value; | 347 | gops->get_litter_value = gp106_ops.get_litter_value; |
@@ -349,8 +353,8 @@ int gp106_init_hal(struct gk20a *g) | |||
349 | gops->securegpccs = 1; | 353 | gops->securegpccs = 1; |
350 | gops->pmupstate = true; | 354 | gops->pmupstate = true; |
351 | 355 | ||
356 | |||
352 | g->bootstrap_owner = LSF_FALCON_ID_SEC2; | 357 | g->bootstrap_owner = LSF_FALCON_ID_SEC2; |
353 | gp10b_init_priv_ring(gops); | ||
354 | gp106_init_gr(gops); | 358 | gp106_init_gr(gops); |
355 | gp10b_init_fecs_trace_ops(gops); | 359 | gp10b_init_fecs_trace_ops(gops); |
356 | gp106_init_fb(gops); | 360 | gp106_init_fb(gops); |
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index fab1c238..4479be42 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -266,6 +266,9 @@ static const struct gpu_ops gp10b_ops = { | |||
266 | .falcon = { | 266 | .falcon = { |
267 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, | 267 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, |
268 | }, | 268 | }, |
269 | .priv_ring = { | ||
270 | .isr = gp10b_priv_ring_isr, | ||
271 | }, | ||
269 | .chip_init_gpu_characteristics = gp10b_init_gpu_characteristics, | 272 | .chip_init_gpu_characteristics = gp10b_init_gpu_characteristics, |
270 | .get_litter_value = gp10b_get_litter_value, | 273 | .get_litter_value = gp10b_get_litter_value, |
271 | }; | 274 | }; |
@@ -288,6 +291,8 @@ int gp10b_init_hal(struct gk20a *g) | |||
288 | #endif | 291 | #endif |
289 | gops->falcon = gp10b_ops.falcon; | 292 | gops->falcon = gp10b_ops.falcon; |
290 | 293 | ||
294 | gops->priv_ring = gp10b_ops.priv_ring; | ||
295 | |||
291 | /* Lone Functions */ | 296 | /* Lone Functions */ |
292 | gops->chip_init_gpu_characteristics = | 297 | gops->chip_init_gpu_characteristics = |
293 | gp10b_ops.chip_init_gpu_characteristics; | 298 | gp10b_ops.chip_init_gpu_characteristics; |
@@ -332,7 +337,6 @@ int gp10b_init_hal(struct gk20a *g) | |||
332 | #endif | 337 | #endif |
333 | 338 | ||
334 | g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; | 339 | g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; |
335 | gp10b_init_priv_ring(gops); | ||
336 | gp10b_init_gr(gops); | 340 | gp10b_init_gr(gops); |
337 | gp10b_init_fecs_trace_ops(gops); | 341 | gp10b_init_fecs_trace_ops(gops); |
338 | gp10b_init_fb(gops); | 342 | gp10b_init_fb(gops); |
diff --git a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c b/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c index 8aaa7bff..0ca29809 100644 --- a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c | |||
@@ -27,7 +27,7 @@ | |||
27 | #include <nvgpu/hw/gp10b/hw_pri_ringstation_sys_gp10b.h> | 27 | #include <nvgpu/hw/gp10b/hw_pri_ringstation_sys_gp10b.h> |
28 | #include <nvgpu/hw/gp10b/hw_pri_ringstation_gpc_gp10b.h> | 28 | #include <nvgpu/hw/gp10b/hw_pri_ringstation_gpc_gp10b.h> |
29 | 29 | ||
30 | static void gp10b_priv_ring_isr(struct gk20a *g) | 30 | void gp10b_priv_ring_isr(struct gk20a *g) |
31 | { | 31 | { |
32 | u32 status0, status1; | 32 | u32 status0, status1; |
33 | u32 cmd; | 33 | u32 cmd; |
@@ -76,8 +76,3 @@ static void gp10b_priv_ring_isr(struct gk20a *g) | |||
76 | if (retry <= 0) | 76 | if (retry <= 0) |
77 | nvgpu_warn(g, "priv ringmaster cmd ack too many retries"); | 77 | nvgpu_warn(g, "priv ringmaster cmd ack too many retries"); |
78 | } | 78 | } |
79 | |||
80 | void gp10b_init_priv_ring(struct gpu_ops *gops) | ||
81 | { | ||
82 | gops->priv_ring.isr = gp10b_priv_ring_isr; | ||
83 | } | ||
diff --git a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.h b/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.h index acd0857f..e12a2f27 100644 --- a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.h | |||
@@ -15,8 +15,8 @@ | |||
15 | #ifndef __PRIV_RING_GP10B_H__ | 15 | #ifndef __PRIV_RING_GP10B_H__ |
16 | #define __PRIV_RING_GP10B_H__ | 16 | #define __PRIV_RING_GP10B_H__ |
17 | 17 | ||
18 | struct gpu_ops; | 18 | struct gk20a; |
19 | 19 | ||
20 | void gp10b_init_priv_ring(struct gpu_ops *gops); | 20 | void gp10b_priv_ring_isr(struct gk20a *g); |
21 | 21 | ||
22 | #endif /*__PRIV_RING_GP10B_H__*/ | 22 | #endif /*__PRIV_RING_GP10B_H__*/ |