diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-02-02 13:43:56 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-03-16 14:48:24 -0400 |
commit | 2821eb31e2363bcaf81266b52967c15827ecee04 (patch) | |
tree | e2bedbb520306781bb33282c595ccc02ca936953 | |
parent | 886016190c804743da83f9e0db3366fef9720d0a (diff) |
gpu: nvgpu: Rename clk->get_rate to measure_freq
get_rate is already used for call-back that queries the last set
clock rate. This instance of get_rate actually measures the frequency
so renaming it to measure_freq.
At the same time modify to use hertz instead of megahertz. We use
fractional megahertz already in GPU.
Change-Id: I387473d6a6cbf3bb9b9e5a909677a1a725403c32
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1300111
Reviewed-by: Alex Waterman <alexw@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk_arb.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/clk_gp106.c | 9 |
3 files changed, 9 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_arb.c b/drivers/gpu/nvgpu/clk/clk_arb.c index 3bf64d0b..44b442d8 100644 --- a/drivers/gpu/nvgpu/clk/clk_arb.c +++ b/drivers/gpu/nvgpu/clk/clk_arb.c | |||
@@ -1708,11 +1708,13 @@ int nvgpu_clk_arb_get_arbiter_effective_mhz(struct gk20a *g, | |||
1708 | { | 1708 | { |
1709 | switch(api_domain) { | 1709 | switch(api_domain) { |
1710 | case NVGPU_GPU_CLK_DOMAIN_MCLK: | 1710 | case NVGPU_GPU_CLK_DOMAIN_MCLK: |
1711 | *freq_mhz = g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_MCLK); | 1711 | *freq_mhz = g->ops.clk.measure_freq(g, CTRL_CLK_DOMAIN_MCLK) / |
1712 | 1000000ULL; | ||
1712 | return 0; | 1713 | return 0; |
1713 | 1714 | ||
1714 | case NVGPU_GPU_CLK_DOMAIN_GPCCLK: | 1715 | case NVGPU_GPU_CLK_DOMAIN_GPCCLK: |
1715 | *freq_mhz = g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPC2CLK) / 2; | 1716 | *freq_mhz = g->ops.clk.measure_freq(g, CTRL_CLK_DOMAIN_GPC2CLK) / |
1717 | 2000000ULL; | ||
1716 | return 0; | 1718 | return 0; |
1717 | 1719 | ||
1718 | default: | 1720 | default: |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 092bf7ae..5a4eaf39 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -690,7 +690,7 @@ struct gpu_ops { | |||
690 | int (*init_clk_support)(struct gk20a *g); | 690 | int (*init_clk_support)(struct gk20a *g); |
691 | int (*suspend_clk_support)(struct gk20a *g); | 691 | int (*suspend_clk_support)(struct gk20a *g); |
692 | u32 (*get_crystal_clk_hz)(struct gk20a *g); | 692 | u32 (*get_crystal_clk_hz)(struct gk20a *g); |
693 | u16 (*get_rate)(struct gk20a *g, u32 api_domain); | 693 | unsigned long (*measure_freq)(struct gk20a *g, u32 api_domain); |
694 | } clk; | 694 | } clk; |
695 | struct { | 695 | struct { |
696 | u32 (*get_arbiter_clk_domains)(struct gk20a *g); | 696 | u32 (*get_arbiter_clk_domains)(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gp106/clk_gp106.c b/drivers/gpu/nvgpu/gp106/clk_gp106.c index 3b9c444d..6bc4f3b0 100644 --- a/drivers/gpu/nvgpu/gp106/clk_gp106.c +++ b/drivers/gpu/nvgpu/gp106/clk_gp106.c | |||
@@ -43,13 +43,12 @@ static int clk_gp106_debugfs_init(struct gk20a *g); | |||
43 | 43 | ||
44 | 44 | ||
45 | static u32 gp106_get_rate_cntr(struct gk20a *g, struct namemap_cfg *); | 45 | static u32 gp106_get_rate_cntr(struct gk20a *g, struct namemap_cfg *); |
46 | static u16 gp106_clk_get_rate(struct gk20a *g, u32 api_domain); | ||
47 | static u32 gp106_crystal_clk_hz(struct gk20a *g) | 46 | static u32 gp106_crystal_clk_hz(struct gk20a *g) |
48 | { | 47 | { |
49 | return (XTAL4X_KHZ * 1000); | 48 | return (XTAL4X_KHZ * 1000); |
50 | } | 49 | } |
51 | 50 | ||
52 | static u16 gp106_clk_get_rate(struct gk20a *g, u32 api_domain) | 51 | static unsigned long gp106_clk_measure_freq(struct gk20a *g, u32 api_domain) |
53 | { | 52 | { |
54 | struct clk_gk20a *clk = &g->clk; | 53 | struct clk_gk20a *clk = &g->clk; |
55 | u32 freq_khz; | 54 | u32 freq_khz; |
@@ -69,8 +68,8 @@ static u16 gp106_clk_get_rate(struct gk20a *g, u32 api_domain) | |||
69 | freq_khz = c->is_counter ? c->scale * gp106_get_rate_cntr(g, c) : | 68 | freq_khz = c->is_counter ? c->scale * gp106_get_rate_cntr(g, c) : |
70 | 0; /* TODO: PLL read */ | 69 | 0; /* TODO: PLL read */ |
71 | 70 | ||
72 | /* Convert to MHZ */ | 71 | /* Convert to HZ */ |
73 | return (u16) (freq_khz/1000); | 72 | return freq_khz * 1000UL; |
74 | } | 73 | } |
75 | 74 | ||
76 | static int gp106_init_clk_support(struct gk20a *g) { | 75 | static int gp106_init_clk_support(struct gk20a *g) { |
@@ -270,5 +269,5 @@ err_out: | |||
270 | void gp106_init_clk_ops(struct gpu_ops *gops) { | 269 | void gp106_init_clk_ops(struct gpu_ops *gops) { |
271 | gops->clk.init_clk_support = gp106_init_clk_support; | 270 | gops->clk.init_clk_support = gp106_init_clk_support; |
272 | gops->clk.get_crystal_clk_hz = gp106_crystal_clk_hz; | 271 | gops->clk.get_crystal_clk_hz = gp106_crystal_clk_hz; |
273 | gops->clk.get_rate = gp106_clk_get_rate; | 272 | gops->clk.measure_freq = gp106_clk_measure_freq; |
274 | } | 273 | } |