diff options
author | Seshendra Gadagottu <sgadagottu@nvidia.com> | 2015-10-16 15:31:35 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-11-04 17:38:34 -0500 |
commit | 19b3bd28b3e277d8892f663e7c61a813dbc54feb (patch) | |
tree | 5bd76a4242a9f09b7ba3cbf9ab1eb3f5990875c7 | |
parent | 9592a4e6fce8204e9ada54ba00902e792199fec5 (diff) |
gpu: nvgpu: use platform data for ptimer source rate
Instead of depending on clock frame-work, use platform data
for ptimer source rate. Removed ptimerscaling10x platform
data, and use ptimer source frequency to calculate
ptimerscaling factor.
Reviewed-on: http://git-master/r/819030
(cherry picked from commit dd291334d54dab80cab7eb1656dffc48a59610b4)
Change-Id: I7638ce9875a6e440bbfc2ba2da0d0b094b2700ff
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/827300
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c | 22 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/platform_gk20a.h | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c | 4 |
6 files changed, 29 insertions, 15 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 688992c6..d750f497 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -138,7 +138,7 @@ int gk20a_channel_get_timescale_from_timeslice(struct gk20a *g, | |||
138 | { | 138 | { |
139 | struct gk20a_platform *platform = platform_get_drvdata(g->dev); | 139 | struct gk20a_platform *platform = platform_get_drvdata(g->dev); |
140 | int value = scale_ptimer(timeslice_period, | 140 | int value = scale_ptimer(timeslice_period, |
141 | platform->ptimerscaling10x); | 141 | ptimer_scalingfactor10x(platform->ptimer_src_freq)); |
142 | int shift = 3; | 142 | int shift = 3; |
143 | 143 | ||
144 | /* value field is 8 bits long */ | 144 | /* value field is 8 bits long */ |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 5eba9f12..f6f0cb1d 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -410,7 +410,8 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g) | |||
410 | g->ops.fifo.apply_pb_timeout(g); | 410 | g->ops.fifo.apply_pb_timeout(g); |
411 | 411 | ||
412 | timeout = GRFIFO_TIMEOUT_CHECK_PERIOD_US; | 412 | timeout = GRFIFO_TIMEOUT_CHECK_PERIOD_US; |
413 | timeout = scale_ptimer(timeout, platform->ptimerscaling10x); | 413 | timeout = scale_ptimer(timeout, |
414 | ptimer_scalingfactor10x(platform->ptimer_src_freq)); | ||
414 | timeout |= fifo_eng_timeout_detection_enabled_f(); | 415 | timeout |= fifo_eng_timeout_detection_enabled_f(); |
415 | gk20a_writel(g, fifo_eng_timeout_r(), timeout); | 416 | gk20a_writel(g, fifo_eng_timeout_r(), timeout); |
416 | 417 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index e106c479..58c8e9ad 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -50,6 +50,10 @@ struct acr_gm20b; | |||
50 | #include "cde_gk20a.h" | 50 | #include "cde_gk20a.h" |
51 | #include "debug_gk20a.h" | 51 | #include "debug_gk20a.h" |
52 | 52 | ||
53 | /* PTIMER_REF_FREQ_HZ corresponds to a period of 32 nanoseconds. | ||
54 | 32 ns is the resolution of ptimer. */ | ||
55 | #define PTIMER_REF_FREQ_HZ 31250000 | ||
56 | |||
53 | struct cooling_device_gk20a { | 57 | struct cooling_device_gk20a { |
54 | struct thermal_cooling_device *gk20a_cooling_dev; | 58 | struct thermal_cooling_device *gk20a_cooling_dev; |
55 | unsigned int gk20a_freq_state; | 59 | unsigned int gk20a_freq_state; |
@@ -901,6 +905,10 @@ void gk20a_user_deinit(struct platform_device *dev); | |||
901 | 905 | ||
902 | extern void gk20a_debug_dump_device(struct platform_device *pdev); | 906 | extern void gk20a_debug_dump_device(struct platform_device *pdev); |
903 | 907 | ||
908 | static inline u32 ptimer_scalingfactor10x(u32 ptimer_src_freq) | ||
909 | { | ||
910 | return (u32)(((u64)(PTIMER_REF_FREQ_HZ * 10)) / ptimer_src_freq); | ||
911 | } | ||
904 | static inline u32 scale_ptimer(u32 timeout , u32 scale10x) | 912 | static inline u32 scale_ptimer(u32 timeout , u32 scale10x) |
905 | { | 913 | { |
906 | if (((timeout*10) % scale10x) >= (scale10x/2)) | 914 | if (((timeout*10) % scale10x) >= (scale10x/2)) |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c index 945b332d..2d803d0e 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <linux/kernel.h> | 23 | #include <linux/kernel.h> |
24 | #include <linux/fb.h> | 24 | #include <linux/fb.h> |
25 | #include <linux/gk20a.h> | 25 | #include <linux/gk20a.h> |
26 | |||
27 | #include <mach/clk.h> | 26 | #include <mach/clk.h> |
28 | 27 | ||
29 | #include "gk20a.h" | 28 | #include "gk20a.h" |
@@ -33,9 +32,6 @@ | |||
33 | 32 | ||
34 | 33 | ||
35 | #define PTIMER_FP_FACTOR 1000000 | 34 | #define PTIMER_FP_FACTOR 1000000 |
36 | /* PTIMER_REF_FREQ_HZ corresponds to a period of 32 nanoseconds. 32 ns is | ||
37 | the resolution of ptimer. */ | ||
38 | #define PTIMER_REF_FREQ_HZ 31250000 | ||
39 | 35 | ||
40 | #define ROOTRW (S_IRWXU|S_IRGRP|S_IROTH) | 36 | #define ROOTRW (S_IRWXU|S_IRGRP|S_IROTH) |
41 | 37 | ||
@@ -208,17 +204,27 @@ static ssize_t ptimer_scale_factor_show(struct device *dev, | |||
208 | struct device_attribute *attr, | 204 | struct device_attribute *attr, |
209 | char *buf) | 205 | char *buf) |
210 | { | 206 | { |
211 | u32 tsc_freq_hz = clk_get_rate(clk_get_sys(NULL, "clk_m")); | 207 | struct gk20a_platform *platform = dev_get_drvdata(dev); |
212 | u32 scaling_factor_fp = (u32)(PTIMER_REF_FREQ_HZ) / | 208 | u32 src_freq_hz = platform->ptimer_src_freq; |
213 | ((u32)(tsc_freq_hz) / | 209 | u32 scaling_factor_fp; |
210 | ssize_t res; | ||
211 | |||
212 | if (!src_freq_hz) { | ||
213 | dev_err(dev, "reference clk_m rate is not set correctly\n"); | ||
214 | return -EINVAL; | ||
215 | } | ||
216 | |||
217 | scaling_factor_fp = (u32)(PTIMER_REF_FREQ_HZ) / | ||
218 | ((u32)(src_freq_hz) / | ||
214 | (u32)(PTIMER_FP_FACTOR)); | 219 | (u32)(PTIMER_FP_FACTOR)); |
215 | ssize_t res = snprintf(buf, | 220 | res = snprintf(buf, |
216 | PAGE_SIZE, | 221 | PAGE_SIZE, |
217 | "%u.%u\n", | 222 | "%u.%u\n", |
218 | scaling_factor_fp / PTIMER_FP_FACTOR, | 223 | scaling_factor_fp / PTIMER_FP_FACTOR, |
219 | scaling_factor_fp % PTIMER_FP_FACTOR); | 224 | scaling_factor_fp % PTIMER_FP_FACTOR); |
220 | 225 | ||
221 | return res; | 226 | return res; |
227 | |||
222 | } | 228 | } |
223 | 229 | ||
224 | static DEVICE_ATTR(ptimer_scale_factor, | 230 | static DEVICE_ATTR(ptimer_scale_factor, |
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h index 0c3c6ff3..c1444985 100644 --- a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h | |||
@@ -97,9 +97,6 @@ struct gk20a_platform { | |||
97 | /* Default big page size 64K or 128K */ | 97 | /* Default big page size 64K or 128K */ |
98 | u32 default_big_page_size; | 98 | u32 default_big_page_size; |
99 | 99 | ||
100 | /* scaling factor for ptimer */ | ||
101 | u32 ptimerscaling10x; | ||
102 | |||
103 | /* Initialize the platform interface of the gk20a driver. | 100 | /* Initialize the platform interface of the gk20a driver. |
104 | * | 101 | * |
105 | * The platform implementation of this function must | 102 | * The platform implementation of this function must |
@@ -191,6 +188,8 @@ struct gk20a_platform { | |||
191 | u64 virt_handle; | 188 | u64 virt_handle; |
192 | struct task_struct *intr_handler; | 189 | struct task_struct *intr_handler; |
193 | #endif | 190 | #endif |
191 | /* source frequency for ptimer in hz */ | ||
192 | u32 ptimer_src_freq; | ||
194 | 193 | ||
195 | bool has_cde; | 194 | bool has_cde; |
196 | }; | 195 | }; |
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c index 2c9cfb63..8733f356 100644 --- a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c +++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c | |||
@@ -812,7 +812,7 @@ struct gk20a_platform gk20a_tegra_platform = { | |||
812 | .enable_elcg = true, | 812 | .enable_elcg = true, |
813 | .enable_elpg = true, | 813 | .enable_elpg = true, |
814 | .enable_aelpg = true, | 814 | .enable_aelpg = true, |
815 | .ptimerscaling10x = 26, | 815 | .ptimer_src_freq = 12000000, |
816 | 816 | ||
817 | .force_reset_in_do_idle = false, | 817 | .force_reset_in_do_idle = false, |
818 | 818 | ||
@@ -861,7 +861,7 @@ struct gk20a_platform gm20b_tegra_platform = { | |||
861 | .enable_elcg = true, | 861 | .enable_elcg = true, |
862 | .enable_elpg = true, | 862 | .enable_elpg = true, |
863 | .enable_aelpg = true, | 863 | .enable_aelpg = true, |
864 | .ptimerscaling10x = 26, | 864 | .ptimer_src_freq = 19200000, |
865 | 865 | ||
866 | .force_reset_in_do_idle = false, | 866 | .force_reset_in_do_idle = false, |
867 | 867 | ||