gpu: nvgpu: Cleanup more set but unused variables

This time they were largely located in the various common directories.

JIRA NVGPU-525

Change-Id: I3a6d523b060a0c6761b227267890298c6d2fb19f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1673820
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

8 files changed, 2 insertions, 32 deletions

diff --git a/drivers/gpu/nvgpu/clk/clk.c b/drivers/gpu/nvgpu/clk/clk.c
index 3906be48..ecc352b1 100644
--- a/drivers/gpu/nvgpu/clk/clk.c
+++ b/drivers/gpu/nvgpu/clk/clk.c
@@ -58,7 +58,6 @@ static void clkrpc_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
 int clk_pmu_freq_controller_load(struct gk20a *g, bool bload, u8 bit_idx)
 {
         struct pmu_cmd cmd;
-        struct pmu_msg msg;
         struct pmu_payload payload;
         u32 status;
         u32 seqdesc;
@@ -122,7 +121,6 @@ int clk_pmu_freq_controller_load(struct gk20a *g, bool bload, u8 bit_idx)
                         (u32)sizeof(struct pmu_hdr);
 
         cmd.cmd.clk.cmd_type = NV_PMU_CLK_CMD_ID_RPC;
-        msg.hdr.size = sizeof(struct pmu_msg);
 
         payload.in.buf = (u8 *)&rpccall;
         payload.in.size = (u32)sizeof(struct nv_pmu_clk_rpc);
@@ -163,7 +161,6 @@ done:
 u32 clk_pmu_vin_load(struct gk20a *g)
 {
         struct pmu_cmd cmd;
-        struct pmu_msg msg;
         struct pmu_payload payload;
         u32 status;
         u32 seqdesc;
@@ -185,7 +182,6 @@ u32 clk_pmu_vin_load(struct gk20a *g)
                         (u32)sizeof(struct pmu_hdr);
 
         cmd.cmd.clk.cmd_type = NV_PMU_CLK_CMD_ID_RPC;
-        msg.hdr.size = sizeof(struct pmu_msg);
 
         payload.in.buf = (u8 *)&rpccall;
         payload.in.size = (u32)sizeof(struct nv_pmu_clk_rpc);
@@ -226,7 +222,6 @@ done:
 static u32 clk_pmu_vf_inject(struct gk20a *g, struct set_fll_clk *setfllclk)
 {
         struct pmu_cmd cmd;
-        struct pmu_msg msg;
         struct pmu_payload payload;
         u32 status;
         u32 seqdesc;
@@ -286,7 +281,6 @@ static u32 clk_pmu_vf_inject(struct gk20a *g, struct set_fll_clk *setfllclk)
                         (u32)sizeof(struct pmu_hdr);
 
         cmd.cmd.clk.cmd_type = NV_PMU_CLK_CMD_ID_RPC;
-        msg.hdr.size = sizeof(struct pmu_msg);
 
         payload.in.buf = (u8 *)&rpccall;
         payload.in.size = (u32)sizeof(struct nv_pmu_clk_rpc);
diff --git a/drivers/gpu/nvgpu/clk/clk_freq_controller.c b/drivers/gpu/nvgpu/clk/clk_freq_controller.c
index f5c1e929..fce177a7 100644
--- a/drivers/gpu/nvgpu/clk/clk_freq_controller.c
+++ b/drivers/gpu/nvgpu/clk/clk_freq_controller.c
@@ -180,7 +180,6 @@ static u32 clk_get_freq_controller_table(struct gk20a *g,
         struct vbios_fct_1x_entry entry  = { 0 };
         u8 entry_idx;
         u8 *entry_offset;
-        u32 freq_controller_id;
         struct clk_freq_controller *pclk_freq_cntr = NULL;
         struct clk_freq_controller *ptmp_freq_cntr = NULL;
         struct clk_freq_controller_pi *ptmp_freq_cntr_pi = NULL;
@@ -233,8 +232,6 @@ static u32 clk_get_freq_controller_table(struct gk20a *g,
                         (u8)BIOS_GET_FIELD(entry.param0,
                                 NV_VBIOS_FCT_1X_ENTRY_PARAM0_ID);
 
-                freq_controller_id = ptmp_freq_cntr->controller_id;
-
                 pclk_domain = CLK_CLK_DOMAIN_GET((&g->clk_pmu),
                                 (u32)entry.clk_domain_idx);
                 freq_controller_data.freq_controller.clk_domain =
diff --git a/drivers/gpu/nvgpu/clk/clk_vf_point.c b/drivers/gpu/nvgpu/clk/clk_vf_point.c
index 49327698..0189bd8c 100644
--- a/drivers/gpu/nvgpu/clk/clk_vf_point.c
+++ b/drivers/gpu/nvgpu/clk/clk_vf_point.c
@@ -93,7 +93,6 @@ u32 clk_vf_point_sw_setup(struct gk20a *g)
 {
         u32 status;
         struct boardobjgrp *pboardobjgrp = NULL;
-        struct clk_vf_points *pclkvfpointobjs;
 
         gk20a_dbg_info("");
 
@@ -106,7 +105,6 @@ u32 clk_vf_point_sw_setup(struct gk20a *g)
         }
 
         pboardobjgrp = &g->clk_pmu.clk_vf_pointobjs.super.super;
-        pclkvfpointobjs = &(g->clk_pmu.clk_vf_pointobjs);
 
         BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, CLK, CLK_VF_POINT);
 
diff --git a/drivers/gpu/nvgpu/clk/clk_vin.c b/drivers/gpu/nvgpu/clk/clk_vin.c
index 17e1c15a..6f47d2c8 100644
--- a/drivers/gpu/nvgpu/clk/clk_vin.c
+++ b/drivers/gpu/nvgpu/clk/clk_vin.c
@@ -387,16 +387,12 @@ static u32 devinit_get_vin_device_table(struct gk20a *g,
         /* Read table entries*/
         vin_tbl_entry_ptr = vin_table_ptr + vin_desc_table_header.header_sizee;
         for (index = 0; index < vin_desc_table_header.entry_count; index++) {
-                u32 vin_id;
-
                 memcpy(&vin_desc_table_entry, vin_tbl_entry_ptr,
                        sizeof(struct vin_descriptor_entry_10));
 
                 if (vin_desc_table_entry.vin_device_type == CTRL_CLK_VIN_TYPE_DISABLED)
                         continue;
 
-                vin_id = vin_desc_table_entry.vin_device_id;
-
                 vin_dev_data.super.type =
                         (u8)vin_desc_table_entry.vin_device_type;
                 vin_dev_data.id = (u8)vin_desc_table_entry.vin_device_id;
diff --git a/drivers/gpu/nvgpu/gp106/xve_gp106.c b/drivers/gpu/nvgpu/gp106/xve_gp106.c
index 5acf35b2..ac6684a5 100644
--- a/drivers/gpu/nvgpu/gp106/xve_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/xve_gp106.c
@@ -162,10 +162,6 @@ static void set_xve_l1_mask(struct gk20a *g, int status)
  */
 void xve_disable_aspm_gp106(struct gk20a *g)
 {
-        u32 xve_priv;
-
-        xve_priv = g->ops.xve.xve_readl(g, xve_priv_xv_r());
-
         set_xve_l0s_mask(g, true);
         set_xve_l1_mask(g, true);
 }
diff --git a/drivers/gpu/nvgpu/lpwr/rppg.c b/drivers/gpu/nvgpu/lpwr/rppg.c
index b1c72a4a..6fc86b2b 100644
--- a/drivers/gpu/nvgpu/lpwr/rppg.c
+++ b/drivers/gpu/nvgpu/lpwr/rppg.c
@@ -29,18 +29,15 @@
 static void pmu_handle_rppg_init_msg(struct gk20a *g, struct pmu_msg *msg,
         void *param, u32 handle, u32 status)
 {
-
-        u8 ctrlId = NV_PMU_RPPG_CTRL_ID_MAX;
         u32 *success = param;
 
         if (status == 0) {
                 switch (msg->msg.pg.rppg_msg.cmn.msg_id) {
                 case NV_PMU_RPPG_MSG_ID_INIT_CTRL_ACK:
-                        ctrlId = msg->msg.pg.rppg_msg.init_ctrl_ack.ctrl_id;
                         *success = 1;
                         nvgpu_pmu_dbg(g, "RPPG is acknowledged from PMU %x",
                                 msg->msg.pg.msg_type);
-                break;
+                        break;
                 }
         }
 
@@ -160,5 +157,3 @@ u32 init_rppg(struct gk20a *g)
 
         return status;
 }
-
-
diff --git a/drivers/gpu/nvgpu/perf/perf.c b/drivers/gpu/nvgpu/perf/perf.c
index 7dd435e5..55e67b15 100644
--- a/drivers/gpu/nvgpu/perf/perf.c
+++ b/drivers/gpu/nvgpu/perf/perf.c
@@ -68,7 +68,6 @@ static int pmu_handle_perf_event(struct gk20a *g, void *pmu_msg)
 u32 perf_pmu_vfe_load(struct gk20a *g)
 {
         struct pmu_cmd cmd;
-        struct pmu_msg msg;
         struct pmu_payload payload;
         u32 status;
         u32 seqdesc;
@@ -89,7 +88,6 @@ u32 perf_pmu_vfe_load(struct gk20a *g)
                        (u32)sizeof(struct pmu_hdr);
 
         cmd.cmd.perf.cmd_type = NV_PMU_PERF_CMD_ID_RPC;
-        msg.hdr.size = sizeof(struct pmu_msg);
 
         payload.in.buf = (u8 *)&rpccall;
         payload.in.size = (u32)sizeof(struct nv_pmu_perf_rpc);
diff --git a/drivers/gpu/nvgpu/volt/volt_policy.c b/drivers/gpu/nvgpu/volt/volt_policy.c
index 6f53c721..a69c38bb 100644
--- a/drivers/gpu/nvgpu/volt/volt_policy.c
+++ b/drivers/gpu/nvgpu/volt/volt_policy.c
@@ -198,7 +198,6 @@ static u32 volt_construct_volt_policy_split_rail_single_step(struct gk20a *g,
         struct boardobj **ppboardobj, u16 size, void *pargs)
 {
         struct boardobj *pboardobj   = NULL;
-        struct voltage_policy_split_rail_single_step *p_volt_policy = NULL;
         u32 status = 0;
 
         status = construct_volt_policy_split_rail(g, ppboardobj, size, pargs);
@@ -206,9 +205,6 @@ static u32 volt_construct_volt_policy_split_rail_single_step(struct gk20a *g,
                 return status;
 
         pboardobj = (*ppboardobj);
-        p_volt_policy = (struct voltage_policy_split_rail_single_step *)
-                                                *ppboardobj;
-
         pboardobj->pmudatainit = volt_policy_pmu_data_init_split_rail;
 
         return status;
@@ -455,7 +451,7 @@ u32 volt_policy_sw_setup(struct gk20a *g)
 
         gk20a_dbg_info("");
 
-        status = boardobjgrpconstruct_e32(g, 
+        status = boardobjgrpconstruct_e32(g,
                         &g->perf_pmu.volt.volt_policy_metadata.volt_policies);
         if (status) {
                 nvgpu_err(g,