diff options
author | Vaikundanathan S <vaikuns@nvidia.com> | 2018-08-06 00:03:54 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-09 19:29:38 -0400 |
commit | 0a0ad7e67560cfc18874795532ee1eba3b865e59 (patch) | |
tree | 76c5066aa97d0bbaa7b0f4f6a7b775270dea9ddb | |
parent | 3a3edd0e4fe9e2c6e7c5cba71805b2abce2eb474 (diff) |
gpu: nvgpu: Add PMU rpc reply
Add reply messages for Therm, clock and Perf.
Bug 200428344
Change-Id: Ifb325d546a81f6810ac88b87cc10b718d279ac82
Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1792825
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu_ipc.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c index cb7c10a3..37abb34c 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c | |||
@@ -798,6 +798,15 @@ static void pmu_rpc_handler(struct gk20a *g, struct pmu_msg *msg, | |||
798 | "reply NV_PMU_RPC_ID_VOLT_LOAD"); | 798 | "reply NV_PMU_RPC_ID_VOLT_LOAD"); |
799 | } | 799 | } |
800 | break; | 800 | break; |
801 | case PMU_UNIT_CLK: | ||
802 | nvgpu_pmu_dbg(g, "reply PMU_UNIT_CLK"); | ||
803 | break; | ||
804 | case PMU_UNIT_PERF: | ||
805 | nvgpu_pmu_dbg(g, "reply PMU_UNIT_PERF"); | ||
806 | break; | ||
807 | case PMU_UNIT_THERM: | ||
808 | nvgpu_pmu_dbg(g, "reply PMU_UNIT_THERM"); | ||
809 | break; | ||
801 | /* TBD case will be added */ | 810 | /* TBD case will be added */ |
802 | default: | 811 | default: |
803 | nvgpu_err(g, " Invalid RPC response, stats 0x%x", | 812 | nvgpu_err(g, " Invalid RPC response, stats 0x%x", |