diff options
author | Alex Frid <afrid@nvidia.com> | 2014-10-17 22:31:56 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:11:48 -0400 |
commit | 09cc99d33dbd593981974104fdfc67213b9d2916 (patch) | |
tree | 458a3af0a947c6cfd07fbb3bc6b34bea1961afab | |
parent | 4a43c42229b9a60e36ca5b363bb2b9350f16692c (diff) |
gpu: nvgpu: Protect GM20b clock init from div-by-0
Protected GM20b clock initialization from div-by-0 in case when safe
fmax at Vmin is not known, and the respective interface returns zero.
Change-Id: I2064a3182c93f283c7e85c247601203dd1f71af4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/559059
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/clk_gm20b.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c index 7229e168..29a47f7c 100644 --- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c | |||
@@ -1109,10 +1109,10 @@ static int gm20b_init_clk_setup_sw(struct gk20a *g) | |||
1109 | clk_get_parent(clk->tegra_clk)); | 1109 | clk_get_parent(clk->tegra_clk)); |
1110 | safe_rate = safe_rate * (100 - DVFS_SAFE_MARGIN) / 100; | 1110 | safe_rate = safe_rate * (100 - DVFS_SAFE_MARGIN) / 100; |
1111 | dvfs_safe_max_freq = rate_gpu_to_gpc2clk(safe_rate); | 1111 | dvfs_safe_max_freq = rate_gpu_to_gpc2clk(safe_rate); |
1112 | clk->gpc_pll.PL = DIV_ROUND_UP(gpc_pll_params.min_vco, | 1112 | clk->gpc_pll.PL = (dvfs_safe_max_freq == 0) ? 0 : |
1113 | dvfs_safe_max_freq); | 1113 | DIV_ROUND_UP(gpc_pll_params.min_vco, dvfs_safe_max_freq); |
1114 | 1114 | ||
1115 | /* Initial frequency: 1/3 VCO min (low enough to be safe at Vmin) */ | 1115 | /* Initial freq: low enough to be safe at Vmin (default 1/3 VCO min) */ |
1116 | clk->gpc_pll.M = 1; | 1116 | clk->gpc_pll.M = 1; |
1117 | clk->gpc_pll.N = DIV_ROUND_UP(gpc_pll_params.min_vco, | 1117 | clk->gpc_pll.N = DIV_ROUND_UP(gpc_pll_params.min_vco, |
1118 | clk->gpc_pll.clk_in); | 1118 | clk->gpc_pll.clk_in); |