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author | Richard Zhao <rizhao@nvidia.com> | 2016-08-16 17:24:34 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-08-23 14:13:00 -0400 |
commit | 06780e0681b34ec570346fe5d4bdaf7a23f08a36 (patch) | |
tree | 7540671ef3371e1037c3d8859e4b892daef8b4c6 | |
parent | 5d4319ad282d7d9e3c6ef79ea481ca81d61969f2 (diff) |
gpu: nvgpu: vgpu: fix channel abort
set timeout for channel force reset, to prevent submit immediately.
Bug 1778448
JIRA VFND-2097
Change-Id: I729597a68cbdc5ed3f6c878955a10ae7c4659fa4
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1203298
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index 90e44e8c..a797bad4 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -655,6 +655,7 @@ static int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch, | |||
655 | list_for_each_entry(ch_tsg, &tsg->ch_list, ch_entry) { | 655 | list_for_each_entry(ch_tsg, &tsg->ch_list, ch_entry) { |
656 | if (gk20a_channel_get(ch_tsg)) { | 656 | if (gk20a_channel_get(ch_tsg)) { |
657 | gk20a_set_error_notifier(ch_tsg, err_code); | 657 | gk20a_set_error_notifier(ch_tsg, err_code); |
658 | ch_tsg->has_timedout = true; | ||
658 | gk20a_channel_put(ch_tsg); | 659 | gk20a_channel_put(ch_tsg); |
659 | } | 660 | } |
660 | } | 661 | } |
@@ -662,6 +663,7 @@ static int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch, | |||
662 | mutex_unlock(&tsg->ch_list_lock); | 663 | mutex_unlock(&tsg->ch_list_lock); |
663 | } else { | 664 | } else { |
664 | gk20a_set_error_notifier(ch, err_code); | 665 | gk20a_set_error_notifier(ch, err_code); |
666 | ch->has_timedout = true; | ||
665 | } | 667 | } |
666 | 668 | ||
667 | msg.cmd = TEGRA_VGPU_CMD_CHANNEL_FORCE_RESET; | 669 | msg.cmd = TEGRA_VGPU_CMD_CHANNEL_FORCE_RESET; |