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author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2018-01-09 17:33:51 -0500 |
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committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-01-10 11:47:07 -0500 |
commit | e9de95d7e0629c40b5ceb56c07de319bedd3339f (patch) | |
tree | d48300e7b5191f732eaa5105049c9e4bfc81f2e9 /.gitignore | |
parent | 0ac3ba2a99b745f577c752ebf9a6b4291730a36d (diff) |
gpu: nvgpu: use chip specific zbc_c/z format reg
Use chip specific gpcs_swdx_dss_zbc_c_format_reg
and gpcs_swdx_dss_zbc_z_format_reg. These registers
are different for gv11b/gv100 from gp10b/gp106.
Change-Id: I9e209c878a11edc986ba4304ff60fcccbb5087aa
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1635091
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to '.gitignore')
0 files changed, 0 insertions, 0 deletions