<feed xmlns='http://www.w3.org/2005/Atom'>
<title>nvgpu.git/include, branch gpu-paging</title>
<subtitle>Tegra GPU Driver. Originally from nv-tegra.nvidia.com/linux-nvgpu.git.</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/'/>
<entry>
<title>gpu-paging: Allow for more than one buffer to be swapped at a time</title>
<updated>2022-06-03T19:41:42+00:00</updated>
<author>
<name>Joshua Bakita</name>
<email>jbakita@cs.unc.edu</email>
</author>
<published>2022-06-02T18:29:53+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=9296adcd450143f02faf32fbda5b77dba3f03bc7'/>
<id>9296adcd450143f02faf32fbda5b77dba3f03bc7</id>
<content type='text'>
This uses a very primitive linear disk sector allocation scheme.
Sectors are only reused when userspace resets assignment to 0 with
an NVGPU_AS_IOCTL_SWAP_RESET ioctl (which invalidates all current
swap buffers).

This sector assignment scheme is sufficient for use in a TimeWall-
like system, where all allocations are assumed to be static after
after task system release. This is not suitable for a system with
dynamic allocations, unless userspace manually resets swap state
regularly (benchmarks run a reset at start for example).

Support for dynamic allocations is on the backlog.

No significant speed impact.

Benchmarks, 100 iters, after:
gpu_paging_speed, write: 186.0ms +/- 3.51
gpu_paging_speed, read: 162.7ms +/- 2.58
gpu_paging_overhead_speed, write start: 35.4ms +/- 4.47
gpu_paging_overhead_speed, write finish: 3.3ms +/- 0.18
gpu_paging_overhead_speed, read start: 69.8ms +/- 6.42
gpu_paging_overhead_speed, read finish: 43.2ms +/- 0.91
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This uses a very primitive linear disk sector allocation scheme.
Sectors are only reused when userspace resets assignment to 0 with
an NVGPU_AS_IOCTL_SWAP_RESET ioctl (which invalidates all current
swap buffers).

This sector assignment scheme is sufficient for use in a TimeWall-
like system, where all allocations are assumed to be static after
after task system release. This is not suitable for a system with
dynamic allocations, unless userspace manually resets swap state
regularly (benchmarks run a reset at start for example).

Support for dynamic allocations is on the backlog.

No significant speed impact.

Benchmarks, 100 iters, after:
gpu_paging_speed, write: 186.0ms +/- 3.51
gpu_paging_speed, read: 162.7ms +/- 2.58
gpu_paging_overhead_speed, write start: 35.4ms +/- 4.47
gpu_paging_overhead_speed, write finish: 3.3ms +/- 0.18
gpu_paging_overhead_speed, read start: 69.8ms +/- 6.42
gpu_paging_overhead_speed, read finish: 43.2ms +/- 0.91
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu-paging: Split swap in/out to prepare for async support.</title>
<updated>2022-05-30T16:19:42+00:00</updated>
<author>
<name>Joshua Bakita</name>
<email>jbakita@cs.unc.edu</email>
</author>
<published>2022-05-26T02:01:24+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=ff66847a00ac27d8d94b3664ec156a195dbf3676'/>
<id>ff66847a00ac27d8d94b3664ec156a195dbf3676</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu-paging: Initial working implementation</title>
<updated>2022-05-25T01:11:59+00:00</updated>
<author>
<name>Joshua Bakita</name>
<email>jbakita@cs.unc.edu</email>
</author>
<published>2022-05-25T01:11:59+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=ee26a2842ca891d3ae8b1de1b066d29234fc0115'/>
<id>ee26a2842ca891d3ae8b1de1b066d29234fc0115</id>
<content type='text'>
Supports synchronous page out or in of a specific buffer.

Includes fast reverse struct mapped_buf lookup.

Requires initial set of changes to nvmap as well.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Supports synchronous page out or in of a specific buffer.

Includes fast reverse struct mapped_buf lookup.

Requires initial set of changes to nvmap as well.
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: remove channel cycle stats ioctls</title>
<updated>2020-07-27T21:55:13+00:00</updated>
<author>
<name>Thomas Fleury</name>
<email>tfleury@nvidia.com</email>
</author>
<published>2019-02-28T23:01:09+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=ea40ac7e86eb398e390280e5fa25a710fdbbbea8'/>
<id>ea40ac7e86eb398e390280e5fa25a710fdbbbea8</id>
<content type='text'>
Cycle stats and cycle stats snapshot ioctls have been moved to
debug node. Removing channel ioctls.

Bug 2660206
Bug 220464613

Change-Id: I3aecdf4a8310eeb38de2de5ac076048891afe436
Signed-off-by: Thomas Fleury &lt;tfleury@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2030992
(cherry picked from commit f20424ea6a7c6fcf977630e3e95d9e78418f13b8)
Signed-off-by: Gagan Grover &lt;ggrover@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2092020
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Phoenix Jung &lt;pjung@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Peter Daifuku &lt;pdaifuku@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Cycle stats and cycle stats snapshot ioctls have been moved to
debug node. Removing channel ioctls.

Bug 2660206
Bug 220464613

Change-Id: I3aecdf4a8310eeb38de2de5ac076048891afe436
Signed-off-by: Thomas Fleury &lt;tfleury@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2030992
(cherry picked from commit f20424ea6a7c6fcf977630e3e95d9e78418f13b8)
Signed-off-by: Gagan Grover &lt;ggrover@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2092020
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Phoenix Jung &lt;pjung@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Peter Daifuku &lt;pdaifuku@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: add cycle stats to debugger node</title>
<updated>2020-07-27T21:55:01+00:00</updated>
<author>
<name>Thomas Fleury</name>
<email>tfleury@nvidia.com</email>
</author>
<published>2018-12-21T04:34:27+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=5ecc45b5e7f16e00b2407d4259759228ccbdcf4b'/>
<id>5ecc45b5e7f16e00b2407d4259759228ccbdcf4b</id>
<content type='text'>
Add NVGPU_DBG_GPU_IOCTL_CYCLE_STATS to debugger node, to
install/uninstall a buffer for cycle stats.

Add NVGPU_DBG_GPU_IOCTL_CYCLE_STATS_SNAPSHOT to debugger
node, to attach/flush/detach a buffer for Mode-E streamout.

Those ioctls will apply to the first channel in the debug session.

Bug 2660206
Bug 200464613

Change-Id: I0b96d9a07c016690140292fa5886fda545697ee6
Signed-off-by: Thomas Fleury &lt;tfleury@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2002060
(cherry picked from commit 90b0bf98ac01d7fa24c40f6a1f20bfe5fa481d36)
Signed-off-by: Gagan Grover &lt;ggrover@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2092008
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Phoenix Jung &lt;pjung@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Peter Daifuku &lt;pdaifuku@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add NVGPU_DBG_GPU_IOCTL_CYCLE_STATS to debugger node, to
install/uninstall a buffer for cycle stats.

Add NVGPU_DBG_GPU_IOCTL_CYCLE_STATS_SNAPSHOT to debugger
node, to attach/flush/detach a buffer for Mode-E streamout.

Those ioctls will apply to the first channel in the debug session.

Bug 2660206
Bug 200464613

Change-Id: I0b96d9a07c016690140292fa5886fda545697ee6
Signed-off-by: Thomas Fleury &lt;tfleury@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2002060
(cherry picked from commit 90b0bf98ac01d7fa24c40f6a1f20bfe5fa481d36)
Signed-off-by: Gagan Grover &lt;ggrover@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2092008
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Phoenix Jung &lt;pjung@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Peter Daifuku &lt;pdaifuku@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nvgpu: include: Fix NVGPU_TSG_IOCTL_READ_SINGLE_SM_ERROR_STATE definition</title>
<updated>2020-02-17T22:39:10+00:00</updated>
<author>
<name>Anup Mahindre</name>
<email>amahindre@nvidia.com</email>
</author>
<published>2018-10-05T10:59:43+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=380e6b2c0c5e03f35aed68b836f64c907070e297'/>
<id>380e6b2c0c5e03f35aed68b836f64c907070e297</id>
<content type='text'>
IOCTL definition specifies _IOR whereas _IOWR is required

Bug 200412642

Change-Id: I1093362ea621ee507d19236b859b7defb6dfa090
Signed-off-by: Anup Mahindre &lt;amahindre@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1920071
(cherry picked from commit 79af49f86b90a80e20509a3b008440e9b9680cf9)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2287838
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: Sami Kiminki &lt;skiminki@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Thomas Fleury &lt;tfleury@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
IOCTL definition specifies _IOR whereas _IOWR is required

Bug 200412642

Change-Id: I1093362ea621ee507d19236b859b7defb6dfa090
Signed-off-by: Anup Mahindre &lt;amahindre@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1920071
(cherry picked from commit 79af49f86b90a80e20509a3b008440e9b9680cf9)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2287838
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: Sami Kiminki &lt;skiminki@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Thomas Fleury &lt;tfleury@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: add SET_CTX_MMU_DEBUG_MODE ioctl</title>
<updated>2020-01-30T07:41:45+00:00</updated>
<author>
<name>Thomas Fleury</name>
<email>tfleury@nvidia.com</email>
</author>
<published>2019-05-01T00:19:51+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=dc281d6a9ebadaeb66dab092b40b7d6f4559ee39'/>
<id>dc281d6a9ebadaeb66dab092b40b7d6f4559ee39</id>
<content type='text'>
Added NVGPU_DBG_GPU_IOCTL_SET_CTX_MMU_DEBUG_MODE ioctl to set MMU
debug mode for a given context.

Added gr.set_mmu_debug_mode HAL to change NV_PGPC_PRI_MMU_DEBUG_CTRL
for a given channel. HAL implementation for native case is
gm20b_gr_set_mmu_debug_mode. It internally uses regops, which directly
writes to the register if the context is resident, or writes to
gr context otherwise.

Added NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE to enable the feature.
NV_PGPC_PRI_MMU_DEBUG_CTRL has to be context switched in FECS ucode,
so the feature is only enabled on TU104 for now.

Bug 2515097
But 2713590

Change-Id: Ib4efaf06fc47a8539b4474f94c68c20ce225263f
Signed-off-by: Thomas Fleury &lt;tfleury@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2110720
(cherry-picked from commit af2ccb811d3de06f052b1dee39bd9ffa863ac8ce)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208767
Reviewed-by: Kajetan Dutka &lt;kdutka@nvidia.com&gt;
Reviewed-by: Alex Waterman &lt;alexw@nvidia.com&gt;
Reviewed-by: Winnie Hsu &lt;whsu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Kajetan Dutka &lt;kdutka@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Added NVGPU_DBG_GPU_IOCTL_SET_CTX_MMU_DEBUG_MODE ioctl to set MMU
debug mode for a given context.

Added gr.set_mmu_debug_mode HAL to change NV_PGPC_PRI_MMU_DEBUG_CTRL
for a given channel. HAL implementation for native case is
gm20b_gr_set_mmu_debug_mode. It internally uses regops, which directly
writes to the register if the context is resident, or writes to
gr context otherwise.

Added NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE to enable the feature.
NV_PGPC_PRI_MMU_DEBUG_CTRL has to be context switched in FECS ucode,
so the feature is only enabled on TU104 for now.

Bug 2515097
But 2713590

Change-Id: Ib4efaf06fc47a8539b4474f94c68c20ce225263f
Signed-off-by: Thomas Fleury &lt;tfleury@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2110720
(cherry-picked from commit af2ccb811d3de06f052b1dee39bd9ffa863ac8ce)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208767
Reviewed-by: Kajetan Dutka &lt;kdutka@nvidia.com&gt;
Reviewed-by: Alex Waterman &lt;alexw@nvidia.com&gt;
Reviewed-by: Winnie Hsu &lt;whsu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Kajetan Dutka &lt;kdutka@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: add platform atomic support</title>
<updated>2020-01-08T16:35:30+00:00</updated>
<author>
<name>Vinod G</name>
<email>vinodg@nvidia.com</email>
</author>
<published>2019-02-06T02:05:42+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=dacb06f4647b924aa6455e8156b74df5098cf3bf'/>
<id>dacb06f4647b924aa6455e8156b74df5098cf3bf</id>
<content type='text'>
Add new variable in nvgpu_as_map_buffer_ex_args for app
to specify the platform atomic support for the page.
When platform atomic attribute flag is set, pte memory
aperture is set to be coherent type.

renamed nvgpu_aperture_mask_coh -&gt; nvgpu_aperture_mask_raw
function.

bug 200580236

Change-Id: I18266724dafdc8dfd96a0711f23cf08e23682afc
Signed-off-by: Vinod G &lt;vinodg@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2012679
(cherry picked from commit 9e0a9004b71f92b7713fd3b30141b0d9d4cfa2c6)
Signed-off-by: Lakshmanan M &lt;lm@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2274914
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Sreeniketh H &lt;sh@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add new variable in nvgpu_as_map_buffer_ex_args for app
to specify the platform atomic support for the page.
When platform atomic attribute flag is set, pte memory
aperture is set to be coherent type.

renamed nvgpu_aperture_mask_coh -&gt; nvgpu_aperture_mask_raw
function.

bug 200580236

Change-Id: I18266724dafdc8dfd96a0711f23cf08e23682afc
Signed-off-by: Vinod G &lt;vinodg@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2012679
(cherry picked from commit 9e0a9004b71f92b7713fd3b30141b0d9d4cfa2c6)
Signed-off-by: Lakshmanan M &lt;lm@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2274914
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Sreeniketh H &lt;sh@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: mark usermode submit supported for gv11b</title>
<updated>2019-08-15T07:59:04+00:00</updated>
<author>
<name>Konsta Holtta</name>
<email>kholtta@nvidia.com</email>
</author>
<published>2018-09-11T12:00:58+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=d8257c53c7efec25e44b99fa0508058235713424'/>
<id>d8257c53c7efec25e44b99fa0508058235713424</id>
<content type='text'>
Mark usermode submit supported in gv11b and add the characteristics flag
to expose the capability to userspace.

Bug 200145225
Bug 200541476

Change-Id: Id9dcb0c71c020bd509fbdbffb94a756c69377f20
Signed-off-by: Konsta Holtta &lt;kholtta@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1795822
Reviewed-by: Alex Waterman &lt;alexw@nvidia.com&gt;
Reviewed-by: Terje Bergstrom &lt;tbergstrom@nvidia.com&gt;
Reviewed-by: Vijayakumar Subbu &lt;vsubbu@nvidia.com&gt;
Signed-off-by: Debarshi Dutta &lt;ddutta@nvidia.com&gt;
(cherry picked from commit 37659f5c8e0571655178c50a6296b68e3ebdc4cb
in rel-32)
Reviewed-on: https://git-master.nvidia.com/r/2170604
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Mark usermode submit supported in gv11b and add the characteristics flag
to expose the capability to userspace.

Bug 200145225
Bug 200541476

Change-Id: Id9dcb0c71c020bd509fbdbffb94a756c69377f20
Signed-off-by: Konsta Holtta &lt;kholtta@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1795822
Reviewed-by: Alex Waterman &lt;alexw@nvidia.com&gt;
Reviewed-by: Terje Bergstrom &lt;tbergstrom@nvidia.com&gt;
Reviewed-by: Vijayakumar Subbu &lt;vsubbu@nvidia.com&gt;
Signed-off-by: Debarshi Dutta &lt;ddutta@nvidia.com&gt;
(cherry picked from commit 37659f5c8e0571655178c50a6296b68e3ebdc4cb
in rel-32)
Reviewed-on: https://git-master.nvidia.com/r/2170604
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: support usermode submit buffers</title>
<updated>2019-08-15T07:58:54+00:00</updated>
<author>
<name>Konsta Holtta</name>
<email>kholtta@nvidia.com</email>
</author>
<published>2018-09-11T11:47:51+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=8b484c0b531b95fce024e101cdd204f1f8107c29'/>
<id>8b484c0b531b95fce024e101cdd204f1f8107c29</id>
<content type='text'>
Import userd and gpfifo buffers from userspace if provided via
NVGPU_IOCTL_CHANNEL_ALLOC_GPFIFO_EX. Also supply the work submit token
(i.e., the hw channel id) to userspace.

To keep the buffers alive, store their dmabuf and attachment/sgt handles
in nvgpu_channel_linux. Our nvgpu_mem doesn't provide such data for
buffers that are mainly in kernel use. The buffers are freed via a new
API in the os_channel interface.

Fix a bug in gk20a_channel_free_usermode_buffers: also unmap the
usermode gpfifo buffer.

Bug 200145225
Bug 200541476

Change-Id: I8416af7085c91b044ac8ccd9faa38e2a6d0c3946
Signed-off-by: Konsta Holtta &lt;kholtta@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1795821
Signed-off-by: Debarshi Dutta &lt;ddutta@nvidia.com&gt;
(cherry picked from commit 99b1c6dcdf328efcfe47338ad1b71a114ab7f272
in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/2170603
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Import userd and gpfifo buffers from userspace if provided via
NVGPU_IOCTL_CHANNEL_ALLOC_GPFIFO_EX. Also supply the work submit token
(i.e., the hw channel id) to userspace.

To keep the buffers alive, store their dmabuf and attachment/sgt handles
in nvgpu_channel_linux. Our nvgpu_mem doesn't provide such data for
buffers that are mainly in kernel use. The buffers are freed via a new
API in the os_channel interface.

Fix a bug in gk20a_channel_free_usermode_buffers: also unmap the
usermode gpfifo buffer.

Bug 200145225
Bug 200541476

Change-Id: I8416af7085c91b044ac8ccd9faa38e2a6d0c3946
Signed-off-by: Konsta Holtta &lt;kholtta@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1795821
Signed-off-by: Debarshi Dutta &lt;ddutta@nvidia.com&gt;
(cherry picked from commit 99b1c6dcdf328efcfe47338ad1b71a114ab7f272
in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/2170603
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
