<feed xmlns='http://www.w3.org/2005/Atom'>
<title>nvgpu.git/drivers, branch gpu-paging</title>
<subtitle>Tegra GPU Driver. Originally from nv-tegra.nvidia.com/linux-nvgpu.git.</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/'/>
<entry>
<title>gpu-paging: Allow for more than one buffer to be swapped at a time</title>
<updated>2022-06-03T19:41:42+00:00</updated>
<author>
<name>Joshua Bakita</name>
<email>jbakita@cs.unc.edu</email>
</author>
<published>2022-06-02T18:29:53+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=9296adcd450143f02faf32fbda5b77dba3f03bc7'/>
<id>9296adcd450143f02faf32fbda5b77dba3f03bc7</id>
<content type='text'>
This uses a very primitive linear disk sector allocation scheme.
Sectors are only reused when userspace resets assignment to 0 with
an NVGPU_AS_IOCTL_SWAP_RESET ioctl (which invalidates all current
swap buffers).

This sector assignment scheme is sufficient for use in a TimeWall-
like system, where all allocations are assumed to be static after
after task system release. This is not suitable for a system with
dynamic allocations, unless userspace manually resets swap state
regularly (benchmarks run a reset at start for example).

Support for dynamic allocations is on the backlog.

No significant speed impact.

Benchmarks, 100 iters, after:
gpu_paging_speed, write: 186.0ms +/- 3.51
gpu_paging_speed, read: 162.7ms +/- 2.58
gpu_paging_overhead_speed, write start: 35.4ms +/- 4.47
gpu_paging_overhead_speed, write finish: 3.3ms +/- 0.18
gpu_paging_overhead_speed, read start: 69.8ms +/- 6.42
gpu_paging_overhead_speed, read finish: 43.2ms +/- 0.91
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This uses a very primitive linear disk sector allocation scheme.
Sectors are only reused when userspace resets assignment to 0 with
an NVGPU_AS_IOCTL_SWAP_RESET ioctl (which invalidates all current
swap buffers).

This sector assignment scheme is sufficient for use in a TimeWall-
like system, where all allocations are assumed to be static after
after task system release. This is not suitable for a system with
dynamic allocations, unless userspace manually resets swap state
regularly (benchmarks run a reset at start for example).

Support for dynamic allocations is on the backlog.

No significant speed impact.

Benchmarks, 100 iters, after:
gpu_paging_speed, write: 186.0ms +/- 3.51
gpu_paging_speed, read: 162.7ms +/- 2.58
gpu_paging_overhead_speed, write start: 35.4ms +/- 4.47
gpu_paging_overhead_speed, write finish: 3.3ms +/- 0.18
gpu_paging_overhead_speed, read start: 69.8ms +/- 6.42
gpu_paging_overhead_speed, read finish: 43.2ms +/- 0.91
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu-paging: Support asynchronous paging</title>
<updated>2022-05-31T15:32:12+00:00</updated>
<author>
<name>Joshua Bakita</name>
<email>jbakita@cs.unc.edu</email>
</author>
<published>2022-05-30T16:20:48+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=745b3ef2ac4d7afa99202e6afc441e3f0b97f5b4'/>
<id>745b3ef2ac4d7afa99202e6afc441e3f0b97f5b4</id>
<content type='text'>
- Fully enables *_ASYNC API
- Allows page mapping to be overlapped with I/O, resulting in an 11% speedup
  to synchronous reads

Benchmarks, 1,000 iters, before:
gpu_paging_speed, write: 185.5ms +/- 3.58
gpu_paging_speed, read: 180.5ms +/- 1.42
gpu_paging_overhead_speed, write start: 183.3ms +/- 3.89
gpu_paging_overhead_speed, write finish: 3.4ms +/- 2.61
gpu_paging_overhead_speed, read start: 181.6ms +/- 3.34
gpu_paging_overhead_speed, read finish: 41.1ms +/- 2.69

Benchmarks, 1,000 iters, after:
gpu_paging_speed, write: 185.8ms +/- 3.70
gpu_paging_speed, read: 161.3ms +/- 0.97
gpu_paging_overhead_speed, write start: 38.9ms +/- 5.47
gpu_paging_overhead_speed, write finish: 3.1ms +/- 2.42
gpu_paging_overhead_speed, read start: 79.4 +/- 6.42
gpu_paging_overhead_speed, read finish: 44.3 +/- 1.53
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Fully enables *_ASYNC API
- Allows page mapping to be overlapped with I/O, resulting in an 11% speedup
  to synchronous reads

Benchmarks, 1,000 iters, before:
gpu_paging_speed, write: 185.5ms +/- 3.58
gpu_paging_speed, read: 180.5ms +/- 1.42
gpu_paging_overhead_speed, write start: 183.3ms +/- 3.89
gpu_paging_overhead_speed, write finish: 3.4ms +/- 2.61
gpu_paging_overhead_speed, read start: 181.6ms +/- 3.34
gpu_paging_overhead_speed, read finish: 41.1ms +/- 2.69

Benchmarks, 1,000 iters, after:
gpu_paging_speed, write: 185.8ms +/- 3.70
gpu_paging_speed, read: 161.3ms +/- 0.97
gpu_paging_overhead_speed, write start: 38.9ms +/- 5.47
gpu_paging_overhead_speed, write finish: 3.1ms +/- 2.42
gpu_paging_overhead_speed, read start: 79.4 +/- 6.42
gpu_paging_overhead_speed, read finish: 44.3 +/- 1.53
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu-paging: Split swap in/out to prepare for async support.</title>
<updated>2022-05-30T16:19:42+00:00</updated>
<author>
<name>Joshua Bakita</name>
<email>jbakita@cs.unc.edu</email>
</author>
<published>2022-05-26T02:01:24+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=ff66847a00ac27d8d94b3664ec156a195dbf3676'/>
<id>ff66847a00ac27d8d94b3664ec156a195dbf3676</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu-paging: Initial working implementation</title>
<updated>2022-05-25T01:11:59+00:00</updated>
<author>
<name>Joshua Bakita</name>
<email>jbakita@cs.unc.edu</email>
</author>
<published>2022-05-25T01:11:59+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=ee26a2842ca891d3ae8b1de1b066d29234fc0115'/>
<id>ee26a2842ca891d3ae8b1de1b066d29234fc0115</id>
<content type='text'>
Supports synchronous page out or in of a specific buffer.

Includes fast reverse struct mapped_buf lookup.

Requires initial set of changes to nvmap as well.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Supports synchronous page out or in of a specific buffer.

Includes fast reverse struct mapped_buf lookup.

Requires initial set of changes to nvmap as well.
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: add support for disabling l3 via DT</title>
<updated>2022-02-02T20:10:51+00:00</updated>
<author>
<name>Debarshi Dutta</name>
<email>ddutta@nvidia.com</email>
</author>
<published>2022-01-31T02:43:19+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=46b43d2b2485233397f4f62b9bac6d35434b7aea'/>
<id>46b43d2b2485233397f4f62b9bac6d35434b7aea</id>
<content type='text'>
On volta the GPU determines whether to do L3 allocation for a mapping by
checking bit 36 of the physical address. So if a mapping should allocate lines
in the L3 this bit must be set.

However, when the physical addresses for 64GB of RAM uses the 36th bit
resulting in a conflict. Thus, add support for disabling l3 support
for SKUs having 64GB of physical memory.

Bug 3486025

Signed-off-by: Debarshi Dutta &lt;ddutta@nvidia.com&gt;
Change-Id: Ic540e754274cf1d9e6625493962699d21509e540
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2661548
Reviewed-by: Brad Griffis &lt;bgriffis@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Tested-by: Brad Griffis &lt;bgriffis@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On volta the GPU determines whether to do L3 allocation for a mapping by
checking bit 36 of the physical address. So if a mapping should allocate lines
in the L3 this bit must be set.

However, when the physical addresses for 64GB of RAM uses the 36th bit
resulting in a conflict. Thus, add support for disabling l3 support
for SKUs having 64GB of physical memory.

Bug 3486025

Signed-off-by: Debarshi Dutta &lt;ddutta@nvidia.com&gt;
Change-Id: Ic540e754274cf1d9e6625493962699d21509e540
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2661548
Reviewed-by: Brad Griffis &lt;bgriffis@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Tested-by: Brad Griffis &lt;bgriffis@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>nvgpu: fix incorrect mem_desc_count</title>
<updated>2021-11-25T15:24:41+00:00</updated>
<author>
<name>Vikas Siddhabhaktula</name>
<email>vsiddhabhakt@nvidia.com</email>
</author>
<published>2021-10-28T12:17:20+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=de418f6ef634220194514a72db332d9fba350856'/>
<id>de418f6ef634220194514a72db332d9fba350856</id>
<content type='text'>
-   Fix incorrect mem_desc_count increment in the case of failure
-   Increment it only when there is a success

Bug 3399680

Change-Id: I8c04e4859422fb86367113c58ce3e34cab952b63
Signed-off-by: Vikas Siddhabhaktula &lt;vsiddhabhakt@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2618229
Reviewed-by: Thomas Steinle &lt;tsteinle@nvidia.com&gt;
Reviewed-by: Phoenix Jung &lt;pjung@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
-   Fix incorrect mem_desc_count increment in the case of failure
-   Increment it only when there is a success

Bug 3399680

Change-Id: I8c04e4859422fb86367113c58ce3e34cab952b63
Signed-off-by: Vikas Siddhabhaktula &lt;vsiddhabhakt@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2618229
Reviewed-by: Thomas Steinle &lt;tsteinle@nvidia.com&gt;
Reviewed-by: Phoenix Jung &lt;pjung@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: add check for is_railgated</title>
<updated>2021-10-21T14:10:24+00:00</updated>
<author>
<name>Alvin Park</name>
<email>apark@nvidia.com</email>
</author>
<published>2020-12-15T01:34:44+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=4d17d8b10431b1ba5775d35b34e76dbb8f9b448a'/>
<id>4d17d8b10431b1ba5775d35b34e76dbb8f9b448a</id>
<content type='text'>
When try to read '/sys/kernel/debug/gpu.0/railgate_residency'
debug fs node, NULL pointer access error can be happened if
is_railgated function is not assinged.
Add check for is_railgated before calling the function pointer.

Bug 200773027

Change-Id: I914b5b0aa48ccb15affe79510b696ebc91129f67
Signed-off-by: Aditya Gupta &lt;adigupta@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2596320
(cherry picked from commit e649029c7bed3c7afbd454d7e94f9173377f4c64)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2614156
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Rohit Upadhyay &lt;rupadhyay@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When try to read '/sys/kernel/debug/gpu.0/railgate_residency'
debug fs node, NULL pointer access error can be happened if
is_railgated function is not assinged.
Add check for is_railgated before calling the function pointer.

Bug 200773027

Change-Id: I914b5b0aa48ccb15affe79510b696ebc91129f67
Signed-off-by: Aditya Gupta &lt;adigupta@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2596320
(cherry picked from commit e649029c7bed3c7afbd454d7e94f9173377f4c64)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2614156
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Rohit Upadhyay &lt;rupadhyay@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>nvgpu: gpu: adds support for ACR dbg/prod.</title>
<updated>2021-10-11T19:56:53+00:00</updated>
<author>
<name>smadhavan</name>
<email>smadhavan@nvidia.com</email>
</author>
<published>2021-04-07T08:37:26+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=725a5eaa801098f5f59762a87b7200803e82551c'/>
<id>725a5eaa801098f5f59762a87b7200803e82551c</id>
<content type='text'>
ACR ucode is encrypted using different keys for prod/dbg boards.
This change adds a check to select ACR ucode based on board type.

ACR ucode binaries are also renamed with "nv_" prefix to conform
to release naming conventions.

Bug 2672836

Change-Id: I48818f018f903c0d03642c12485d60e392121eb6
Signed-off-by: smadhavan &lt;smadhavan@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2492587
(cherry picked from commit 5dacead521aaee1bd8a3b2e9db3e281c085038f7)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2597878
Reviewed-by: Mayur Poojary &lt;mpoojary@nvidia.com&gt;
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: Mayur Poojary &lt;mpoojary@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ACR ucode is encrypted using different keys for prod/dbg boards.
This change adds a check to select ACR ucode based on board type.

ACR ucode binaries are also renamed with "nv_" prefix to conform
to release naming conventions.

Bug 2672836

Change-Id: I48818f018f903c0d03642c12485d60e392121eb6
Signed-off-by: smadhavan &lt;smadhavan@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2492587
(cherry picked from commit 5dacead521aaee1bd8a3b2e9db3e281c085038f7)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2597878
Reviewed-by: Mayur Poojary &lt;mpoojary@nvidia.com&gt;
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: Mayur Poojary &lt;mpoojary@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: adds support for ACR dbg/prod.</title>
<updated>2021-10-07T13:56:10+00:00</updated>
<author>
<name>mpoojary</name>
<email>mpoojary@nvidia.com</email>
</author>
<published>2021-09-28T11:56:36+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=3af391e862bd580b9748b383c808d5ed63d52c1b'/>
<id>3af391e862bd580b9748b383c808d5ed63d52c1b</id>
<content type='text'>
ACR ucode is encrypted using different keys for prod/dbg boards.
This change adds a check to select ACR ucode based on board type.
Note: This support is added for t18x. In the sub-sequent CL, support
for T210 will be added and since ACR binaries are different for
gp10b and gm20b, a new ACR init function is created for gp10b to
accept new ACR prod/dbg binaries.

Bug 2672836

dev-main reference patch:
https://git-master.nvidia.com/r/c/linux-nvgpu/+/2471590

Change-Id: Ib0a01bce4f3a3187aa15a669649f8510c88dfd0a
Signed-off-by: mpoojary &lt;mpoojary@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2601970
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Mahantesh Kumbar &lt;mkumbar@nvidia.com&gt;
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ACR ucode is encrypted using different keys for prod/dbg boards.
This change adds a check to select ACR ucode based on board type.
Note: This support is added for t18x. In the sub-sequent CL, support
for T210 will be added and since ACR binaries are different for
gp10b and gm20b, a new ACR init function is created for gp10b to
accept new ACR prod/dbg binaries.

Bug 2672836

dev-main reference patch:
https://git-master.nvidia.com/r/c/linux-nvgpu/+/2471590

Change-Id: Ib0a01bce4f3a3187aa15a669649f8510c88dfd0a
Signed-off-by: mpoojary &lt;mpoojary@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2601970
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Mahantesh Kumbar &lt;mkumbar@nvidia.com&gt;
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>nvgpu: gpu: adds support for ACR dbg/prod.</title>
<updated>2021-10-06T02:10:26+00:00</updated>
<author>
<name>smadhavan</name>
<email>smadhavan@nvidia.com</email>
</author>
<published>2021-02-12T06:07:42+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=d87030e73048073d4bf1dd52a461b1efc1f04867'/>
<id>d87030e73048073d4bf1dd52a461b1efc1f04867</id>
<content type='text'>
ACR ucode is encrypted using different keys for prod/dbg boards.
This change adds a check to select ACR ucode based on board type.
Note: This support is added only for t19x.

Bug 2350733
Bug 2672832
Bug 2672836
Bug 2674821
JIRA NVGPU-4001

(cherry picked from commit c19a0f0c26ab94f6bbf4380ab93e458b88589c82)

Change-Id: I2febc2cbe869c06bca0adebd7723b0d6fc1d4b23
Signed-off-by: smadhavan &lt;smadhavan@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2483968
Tested-by: Amulya Yarlagadda &lt;ayarlagadda@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Amulya Yarlagadda &lt;ayarlagadda@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ACR ucode is encrypted using different keys for prod/dbg boards.
This change adds a check to select ACR ucode based on board type.
Note: This support is added only for t19x.

Bug 2350733
Bug 2672832
Bug 2672836
Bug 2674821
JIRA NVGPU-4001

(cherry picked from commit c19a0f0c26ab94f6bbf4380ab93e458b88589c82)

Change-Id: I2febc2cbe869c06bca0adebd7723b0d6fc1d4b23
Signed-off-by: smadhavan &lt;smadhavan@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2483968
Tested-by: Amulya Yarlagadda &lt;ayarlagadda@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Amulya Yarlagadda &lt;ayarlagadda@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
</feed>
