nvgpu.git/drivers/gpu/nvgpu/ctrl, branch gpu-paging

gpu: nvgpu: pmgr: fix MISRA Rule 10.4 Violations

2018-09-27T06:35:37+00:00

MISRA Rule 10.4 only allows the usage of arithmetic operations on
operands of the same essential type category.

Adding "U" at the end of the integer literals to have same type of
operands when an arithmetic operation is performed.

This fixes violation where an arithmetic operation is performed on
signed and unsigned int types.

JIRA NVGPU-992

Change-Id: Id3b2c8ea1af1807087468c6978abfbfc85bee2ec
Signed-off-by: Sai Nikhil 
Reviewed-on: https://git-master.nvidia.com/r/1809757
Reviewed-by: svc-misra-checker 
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza 
Reviewed-by: mobile promotions 
Tested-by: mobile promotions

gpu: nvgpu: volt: fix MISRA Rule 10.4 Violations

2018-09-27T06:35:29+00:00

MISRA Rule 10.4 only allows the usage of arithmetic operations on
operands of the same essential type category.

Adding "U" at the end of the integer literals to have same type of
operands when an arithmetic operation is performed.

This fixes violation where an arithmetic operation is performed on
signed and unsigned int types.

JIRA NVGPU-992

Change-Id: Ic9a911beb6d161df950ca85eb4813547603a8743
Signed-off-by: Sai Nikhil 
Reviewed-on: https://git-master.nvidia.com/r/1809751
Reviewed-by: svc-misra-checker 
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza 
Reviewed-by: mobile promotions 
Tested-by: mobile promotions

gpu:nvgpu: Update number of LUT entries

2018-09-20T17:51:03+00:00

CTRL_CLK_LUT_NUM_ENTRIES to 128
And fix build issues that appeared with 128 entries.

Bug 2331655

Change-Id: If116bff14be9a1923e075f783fdb9a2e992208b8
Signed-off-by: Vaikundanathan S 
Reviewed-on: https://git-master.nvidia.com/r/1810493
Reviewed-on: https://git-master.nvidia.com/r/1813861
Reviewed-by: mobile promotions 
Tested-by: mobile promotions

nvgpu: ctrl: MISRA Rule 21.2 header guard fixes

2018-09-18T06:40:03+00:00

MISRA rule 21.2 doesn't allow the use of macro names which start with
an underscore. These leading underscores are to be removed from the
macro names. This patch will fix such violations in ctrl by renaming
them to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when
there is no keyword repetition between file name and directory or
'NVGPU_HEADER-NAME' when there is repetition.

JIRA NVGPU-1028

Change-Id: Ia7e5bf76dd2a8689e365bdeb27eac4b6e9ca4cfd
Signed-off-by: smadhavan 
Reviewed-on: https://git-master.nvidia.com/r/1815657
Reviewed-by: svc-misra-checker 
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta 
Reviewed-by: Adeel Raza 
Reviewed-by: Vijayakumar Subbu 
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions 
Tested-by: mobile promotions

nvgpu:ps35: Clock domain changes

2018-09-10T22:22:48+00:00

1. PMU interface changes
2. Split PS3.0 and PS3.5 into two dev init functions.
3. Split construct and pmu_data_init to two funcitons.
4. Fixing GV100 impact on PS3.5 changes

Change-Id: I46ba80325d4a249918edbe4cf868ddf47c778aa1
Signed-off-by: Vaikundanathan S 
Reviewed-on: https://git-master.nvidia.com/r/1777739
Reviewed-by: svc-misra-checker 
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu 
Reviewed-by: mobile promotions 
Tested-by: mobile promotions

nvgpu: Add dummy variables to accomodate PS3.5 structure

2018-05-14T14:03:09+00:00

Change-Id: I437f2aba6a63de87033721fa9a29c565cf8f4256
Signed-off-by: Vaikundanathan S 
Reviewed-on: https://git-master.nvidia.com/r/1694546
Reviewed-by: Mahantesh Kumbar 
Tested-by: Mahantesh Kumbar 
Reviewed-by: Vijayakumar Subbu 
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions 
Tested-by: mobile promotions

gpu: nvgpu: vf inject changes

2018-05-14T14:03:05+00:00

- Added vf change inject support for gv10x
- Updated clk_pmu_vf_inject() to fill required data
for pascal or volta vf change inject support
- Added new ctrl clk interface for gv10x clk domain list
- Added pmu interface for gv10x clk domain list &
vf change inject request
- Modified clk cmd, msg & RPC id's to match
with chips_a_23609936 branch

Bug 200399373

Change-Id: Ib9dc10073386f63bdfd92110c7ec3e09b1c484ce
Signed-off-by: Vaikundanathan S 
Signed-off-by: Mahantesh Kumbar 
Reviewed-on: https://git-master.nvidia.com/r/1700746
Reviewed-by: mobile promotions 
Tested-by: mobile promotions

gpu: nvgpu: Update clk_vin interface as per chips_a

2018-05-04T13:09:47+00:00

clk_vin data structures updated as new calibration type (v20) is added.
GP106 header does not have vin calibration type.
Assuming V10 if calibration type is not V20.
Add fuse calibration for V20 type.

Bug 200399373

Change-Id: I9449de1ecb0d0873f3bc16f46660f93fab5b9eac
Signed-off-by: Vaikundanathan S 
Signed-off-by: Mahantesh Kumbar 
Reviewed-on: https://git-master.nvidia.com/r/1687591
Reviewed-by: mobile promotions 
Tested-by: mobile promotions

gpu: nvgpu: Port vf_point as per Chips_a

2018-04-25T16:35:56+00:00

- Update PMU interface for vf_point

Change-Id: I1c457026938025266a9325a93985d81fae3b9fa5
Signed-off-by: Vaikundanathan S 
Reviewed-on: https://git-master.nvidia.com/r/1684286
Reviewed-by: svc-mobile-coverity 
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu 
Reviewed-by: mobile promotions 
Tested-by: mobile promotions

gpu: nvgpu: Update vfe_var interface as per chips_a_23609936

2018-04-25T16:35:45+00:00

Changes made:
1. Fuse value can now be signed or unsigned. A new boolean added to check
if the value is signed or not.
2. Masks added for dependent variable and equations
3. Restructing some data structures as per r384

JIRA NVGPUGV100-39

Change-Id: I7d9d1a55e26a06686f6253dedeb55925a32fd0ad
Signed-off-by: Tejal Kudav 
Reviewed-on: https://git-master.nvidia.com/r/1597761
Reviewed-by: svc-mobile-coverity 
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaikundanathan S 
Tested-by: Vaikundanathan S 
Reviewed-by: Vijayakumar Subbu 
Reviewed-by: mobile promotions 
Tested-by: mobile promotions