<feed xmlns='http://www.w3.org/2005/Atom'>
<title>nvgpu.git/drivers/gpu/nvgpu/common, branch gpu-paging</title>
<subtitle>Tegra GPU Driver. Originally from nv-tegra.nvidia.com/linux-nvgpu.git.</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/'/>
<entry>
<title>gpu-paging: Initial working implementation</title>
<updated>2022-05-25T01:11:59+00:00</updated>
<author>
<name>Joshua Bakita</name>
<email>jbakita@cs.unc.edu</email>
</author>
<published>2022-05-25T01:11:59+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=ee26a2842ca891d3ae8b1de1b066d29234fc0115'/>
<id>ee26a2842ca891d3ae8b1de1b066d29234fc0115</id>
<content type='text'>
Supports synchronous page out or in of a specific buffer.

Includes fast reverse struct mapped_buf lookup.

Requires initial set of changes to nvmap as well.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Supports synchronous page out or in of a specific buffer.

Includes fast reverse struct mapped_buf lookup.

Requires initial set of changes to nvmap as well.
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: stop ELPG init thread during unload</title>
<updated>2021-08-12T12:39:59+00:00</updated>
<author>
<name>Sagar Kamble</name>
<email>skamble@nvidia.com</email>
</author>
<published>2021-08-11T09:24:22+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=5fb06d03ca25a207b9378a7155c0ac3e91b378ee'/>
<id>5fb06d03ca25a207b9378a7155c0ac3e91b378ee</id>
<content type='text'>
ELPG initialization thread creation can fail when the process is killed.
That leads to driver resume failure.

That thread was stopped on suspend and re-created on resume. To avoid
the issue above, don't stop the ELPG thread in suspend and let the
first created thread handle the ELPG state transitions always.
And stop the ELPG thread during unload.

bug 3345977
bug 200685277

Change-Id: I8952edf8d1664ed258f238e265002e716d1bf5c2
Signed-off-by: Sagar Kamble &lt;skamble@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2573763
(cherry picked from commit f4571194b02094c7d447052bf0b411a44582ef09)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2574436
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Konsta Holtta &lt;kholtta@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ELPG initialization thread creation can fail when the process is killed.
That leads to driver resume failure.

That thread was stopped on suspend and re-created on resume. To avoid
the issue above, don't stop the ELPG thread in suspend and let the
first created thread handle the ELPG state transitions always.
And stop the ELPG thread during unload.

bug 3345977
bug 200685277

Change-Id: I8952edf8d1664ed258f238e265002e716d1bf5c2
Signed-off-by: Sagar Kamble &lt;skamble@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2573763
(cherry picked from commit f4571194b02094c7d447052bf0b411a44582ef09)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2574436
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Konsta Holtta &lt;kholtta@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: fix tsg unbind failure paths</title>
<updated>2021-05-04T21:40:56+00:00</updated>
<author>
<name>Sagar Kamble</name>
<email>skamble@nvidia.com</email>
</author>
<published>2021-05-04T07:25:53+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=bb8bf1c76c7abaa4e249944d9cb290d472657e7c'/>
<id>bb8bf1c76c7abaa4e249944d9cb290d472657e7c</id>
<content type='text'>
nvgpu_tsg_unbind_channel_common failure handling missed
channel.clear &amp; nvgpu_tsg_set_mmu_debug_mode calls.

Bug 200711183

Change-Id: I19fd53be55db9df725b7cf467b2673e4cd29deb5
Signed-off-by: Sagar Kamble &lt;skamble@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2521972
(cherry picked from commit 89ec2afbd4538fe5036bef7affed5871d45ec734)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2524251
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
nvgpu_tsg_unbind_channel_common failure handling missed
channel.clear &amp; nvgpu_tsg_set_mmu_debug_mode calls.

Bug 200711183

Change-Id: I19fd53be55db9df725b7cf467b2673e4cd29deb5
Signed-off-by: Sagar Kamble &lt;skamble@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2521972
(cherry picked from commit 89ec2afbd4538fe5036bef7affed5871d45ec734)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2524251
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: retry tsg unbind if NEXT is set</title>
<updated>2021-03-19T21:39:39+00:00</updated>
<author>
<name>Sagar Kamble</name>
<email>skamble@nvidia.com</email>
</author>
<published>2021-02-02T16:32:23+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=13fc430775eb0e39dc06e420d5c92dda7016f6ae'/>
<id>13fc430775eb0e39dc06e420d5c92dda7016f6ae</id>
<content type='text'>
The NEXT bit can remain set for the channel if timeslice expires before
scheduler clears it. Due to this nvgpu fails TSG unbind and in turn
nvrm_gpu fails channel close. In this case, checking the channel hw
state after some time can help see NEXT bit cleared by scheduler.

Reenable the tsg and return -EAGAIN to nvrm_gpu for it to retry again.

Bug 3144960
Bug 200520811

Change-Id: I35f417f02270e371a4e632986b73a00f8a4f921a
Signed-off-by: Sagar Kamble &lt;skamble@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2468391
(cherry picked from commit cf287a4ef592e7329f813c076ec8bdad18dc5933)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2479106
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The NEXT bit can remain set for the channel if timeslice expires before
scheduler clears it. Due to this nvgpu fails TSG unbind and in turn
nvrm_gpu fails channel close. In this case, checking the channel hw
state after some time can help see NEXT bit cleared by scheduler.

Reenable the tsg and return -EAGAIN to nvrm_gpu for it to retry again.

Bug 3144960
Bug 200520811

Change-Id: I35f417f02270e371a4e632986b73a00f8a4f921a
Signed-off-by: Sagar Kamble &lt;skamble@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2468391
(cherry picked from commit cf287a4ef592e7329f813c076ec8bdad18dc5933)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2479106
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: remove ZBC save/restore by PMU</title>
<updated>2021-03-17T16:54:54+00:00</updated>
<author>
<name>Divya Singhatwaria</name>
<email>dsinghatwari@nvidia.com</email>
</author>
<published>2021-01-27T16:05:32+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=9170f2b77cba9aedd957acdde7c758e81e073cc0'/>
<id>9170f2b77cba9aedd957acdde7c758e81e073cc0</id>
<content type='text'>
- ZBC save/restore registers are removed in GP10B PMU ucode.
- These registers are saved/restored from CTXSW ucode during
  ELPG entry/exit.
- Accessing the ZBC registers will cause PMU EXTERR error.
- To resolve this, ZBC functionality is removed from GP10B
  feature list in PMU ucode.
- From NvGPU driver, set NVGPU_PMU_ZBC_SAVE bit to false
  for GP10B
- Updated the GP10B PMU app version for the ucode:
  https://git-master.nvidia.com/r/c/tegra/kernel-firmware-t18x/+/2476260

P4 CL link related to this PMU ucode change:
https://p4sw-swarm.nvidia.com/changes/29594520

Bug 3233071
Bug 200696431

Change-Id: If3f1707b79699e7e2e65367418b25ac71b09cf0b
Signed-off-by: Divya Singhatwaria &lt;dsinghatwari@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2476259
Reviewed-by: Mahantesh Kumbar &lt;mkumbar@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Vijayakumar Subbu &lt;vsubbu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- ZBC save/restore registers are removed in GP10B PMU ucode.
- These registers are saved/restored from CTXSW ucode during
  ELPG entry/exit.
- Accessing the ZBC registers will cause PMU EXTERR error.
- To resolve this, ZBC functionality is removed from GP10B
  feature list in PMU ucode.
- From NvGPU driver, set NVGPU_PMU_ZBC_SAVE bit to false
  for GP10B
- Updated the GP10B PMU app version for the ucode:
  https://git-master.nvidia.com/r/c/tegra/kernel-firmware-t18x/+/2476260

P4 CL link related to this PMU ucode change:
https://p4sw-swarm.nvidia.com/changes/29594520

Bug 3233071
Bug 200696431

Change-Id: If3f1707b79699e7e2e65367418b25ac71b09cf0b
Signed-off-by: Divya Singhatwaria &lt;dsinghatwari@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2476259
Reviewed-by: Mahantesh Kumbar &lt;mkumbar@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Vijayakumar Subbu &lt;vsubbu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: fix possible buffer overflow issue</title>
<updated>2021-03-12T15:54:52+00:00</updated>
<author>
<name>Nitin Kumbhar</name>
<email>nkumbhar@nvidia.com</email>
</author>
<published>2019-09-25T08:57:57+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=7882f15ff63199a517852760f5686ecd0b886123'/>
<id>7882f15ff63199a517852760f5686ecd0b886123</id>
<content type='text'>
As sprintf() is used to populate pool_name[20], it can overflow
for larger u32 values (u32 max decimal number chars are 10) i.e.
20 &lt; strlen("semaphore_pool-") i.e. 15 + 10.

Fix this overflow by removing pool_name as it's not used.

Bug 2626446
Bug 3273414

Change-Id: I4e0a222a2cd34dcd09e69294bc46e2242abb04bb
Signed-off-by: Nitin Kumbhar &lt;nkumbhar@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2205356
(cherry picked from commit baa86cf134ee6753beabfa974a10faffc5775ee8)
Signed-off-by: ByungKuk Seo &lt;bseo@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2496976
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Harsh Sinha &lt;hsinha@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As sprintf() is used to populate pool_name[20], it can overflow
for larger u32 values (u32 max decimal number chars are 10) i.e.
20 &lt; strlen("semaphore_pool-") i.e. 15 + 10.

Fix this overflow by removing pool_name as it's not used.

Bug 2626446
Bug 3273414

Change-Id: I4e0a222a2cd34dcd09e69294bc46e2242abb04bb
Signed-off-by: Nitin Kumbhar &lt;nkumbhar@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/2205356
(cherry picked from commit baa86cf134ee6753beabfa974a10faffc5775ee8)
Signed-off-by: ByungKuk Seo &lt;bseo@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2496976
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Harsh Sinha &lt;hsinha@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: fix mutex wrong acquire</title>
<updated>2021-02-19T18:39:57+00:00</updated>
<author>
<name>Sumit Gupta</name>
<email>sumitg@nvidia.com</email>
</author>
<published>2021-01-20T11:25:25+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=535e9b1dd73cca91bf2217ccce49585c7b1afdeb'/>
<id>535e9b1dd73cca91bf2217ccce49585c7b1afdeb</id>
<content type='text'>
Wrong acquire/release sequence.

 DEBUG_LOCKS_WARN_ON(rt_mutex_owner(lock) != current)
 ....
 CPU: 4 PID: 5404 Comm: cyclictest.sh Not tainted 4.9.201-rt134-tegra #1
 Hardware name: Jetson-AGX (DT)
 ....
 Call trace:
 [&lt;ffffff800810e4f8&gt;] debug_rt_mutex_unlock+0x58/0x68
 [&lt;ffffff8008f34d0c&gt;] rt_mutex_unlock+0x4c/0xb0
 [&lt;ffffff8008f36ea8&gt;] _mutex_unlock+0x20/0x2c
 [&lt;ffffff8000f69d80&gt;] nvgpu_cg_elcg_set_elcg_enabled+0x78/0xf0 [nvgpu]
 [&lt;ffffff8000f7bd44&gt;] nvgpu_intr_nonstall_cb+0x21bc/0x22f0 [nvgpu]
 [&lt;ffffff800875b304&gt;] dev_attr_store+0x44/0x60
 [&lt;ffffff80082dca44&gt;] sysfs_kf_write+0x5c/0x78
 [&lt;ffffff80082dbd28&gt;] kernfs_fop_write+0xc0/0x1d8
 [&lt;ffffff8008245b60&gt;] __vfs_write+0x48/0x128
 [&lt;ffffff8008246b3c&gt;] vfs_write+0xac/0x1b8
 [&lt;ffffff800824808c&gt;] SyS_write+0x5c/0xc8

Bug 3227296

Suggested-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Change-Id: I932a23700539422c07de045dde516c52dd8348cf
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2472903
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Sagar Kamble &lt;skamble@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Wrong acquire/release sequence.

 DEBUG_LOCKS_WARN_ON(rt_mutex_owner(lock) != current)
 ....
 CPU: 4 PID: 5404 Comm: cyclictest.sh Not tainted 4.9.201-rt134-tegra #1
 Hardware name: Jetson-AGX (DT)
 ....
 Call trace:
 [&lt;ffffff800810e4f8&gt;] debug_rt_mutex_unlock+0x58/0x68
 [&lt;ffffff8008f34d0c&gt;] rt_mutex_unlock+0x4c/0xb0
 [&lt;ffffff8008f36ea8&gt;] _mutex_unlock+0x20/0x2c
 [&lt;ffffff8000f69d80&gt;] nvgpu_cg_elcg_set_elcg_enabled+0x78/0xf0 [nvgpu]
 [&lt;ffffff8000f7bd44&gt;] nvgpu_intr_nonstall_cb+0x21bc/0x22f0 [nvgpu]
 [&lt;ffffff800875b304&gt;] dev_attr_store+0x44/0x60
 [&lt;ffffff80082dca44&gt;] sysfs_kf_write+0x5c/0x78
 [&lt;ffffff80082dbd28&gt;] kernfs_fop_write+0xc0/0x1d8
 [&lt;ffffff8008245b60&gt;] __vfs_write+0x48/0x128
 [&lt;ffffff8008246b3c&gt;] vfs_write+0xac/0x1b8
 [&lt;ffffff800824808c&gt;] SyS_write+0x5c/0xc8

Bug 3227296

Suggested-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Change-Id: I932a23700539422c07de045dde516c52dd8348cf
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2472903
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Sagar Kamble &lt;skamble@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: add support for ACB SLCG on gv11b</title>
<updated>2020-10-27T16:24:56+00:00</updated>
<author>
<name>prsethi</name>
<email>prsethi@nvidia.com</email>
</author>
<published>2020-10-18T19:16:00+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=8cb168632bef46e98da7ff5d16b03e03ddfd3d4e'/>
<id>8cb168632bef46e98da7ff5d16b03e03ddfd3d4e</id>
<content type='text'>
Register list for ACB SLCG is auto generated with scripts.
Add HAL operations to enable/disable ACB clock gating.

Cherry-pick/manually port from dev-main

Bug 200647909

Change-Id: I4be4c14cc072fcccd91031a5a40321f5ff11f549
Signed-off-by: Prateek sethi &lt;prsethi@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2420355
(cherry picked from commit c7c04d3a28c2eb0edc8e015dd0130fa50d3496c7)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2434464
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Rajesh Devaraj &lt;rdevaraj@nvidia.com&gt;
Reviewed-by: Peter Daifuku &lt;pdaifuku@nvidia.com&gt;
Reviewed-by: Phoenix Jung &lt;pjung@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Register list for ACB SLCG is auto generated with scripts.
Add HAL operations to enable/disable ACB clock gating.

Cherry-pick/manually port from dev-main

Bug 200647909

Change-Id: I4be4c14cc072fcccd91031a5a40321f5ff11f549
Signed-off-by: Prateek sethi &lt;prsethi@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2420355
(cherry picked from commit c7c04d3a28c2eb0edc8e015dd0130fa50d3496c7)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2434464
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Rajesh Devaraj &lt;rdevaraj@nvidia.com&gt;
Reviewed-by: Peter Daifuku &lt;pdaifuku@nvidia.com&gt;
Reviewed-by: Phoenix Jung &lt;pjung@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: limit PD cache to &lt; pgsize for linux</title>
<updated>2020-10-06T17:10:02+00:00</updated>
<author>
<name>Peter Daifuku</name>
<email>pdaifuku@nvidia.com</email>
</author>
<published>2020-09-30T18:25:05+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=5a948ccca95bcecf9d1e81db02394134f8a18c38'/>
<id>5a948ccca95bcecf9d1e81db02394134f8a18c38</id>
<content type='text'>
For Linux, limit the use of the cache to entries less than the page size, to
avoid potential problems with running out of CMA memory when allocating large,
contiguous slabs, as would be required for non-iommmuable chips.

Also, in nvgpu_pd_cache_do_free(), zero out entries only if iommu is in use
and PTE entries use the cache (since it's the prefetch of invalid PTEs by
iommu that needs to be avoided).

Bug 3093183
Bug 3100907

Change-Id: I363031db32e11bc705810a7e87fc9e9ac1dc00bd
Signed-off-by: Peter Daifuku &lt;pdaifuku@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2422039
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Alex Waterman &lt;alexw@nvidia.com&gt;
Reviewed-by: Dinesh T &lt;dt@nvidia.com&gt;
Reviewed-by: Satish Arora &lt;satisha@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For Linux, limit the use of the cache to entries less than the page size, to
avoid potential problems with running out of CMA memory when allocating large,
contiguous slabs, as would be required for non-iommmuable chips.

Also, in nvgpu_pd_cache_do_free(), zero out entries only if iommu is in use
and PTE entries use the cache (since it's the prefetch of invalid PTEs by
iommu that needs to be avoided).

Bug 3093183
Bug 3100907

Change-Id: I363031db32e11bc705810a7e87fc9e9ac1dc00bd
Signed-off-by: Peter Daifuku &lt;pdaifuku@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2422039
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Alex Waterman &lt;alexw@nvidia.com&gt;
Reviewed-by: Dinesh T &lt;dt@nvidia.com&gt;
Reviewed-by: Satish Arora &lt;satisha@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nvgpu: delete priv cmd buf size warnings</title>
<updated>2020-09-23T02:08:37+00:00</updated>
<author>
<name>Konsta Hölttä</name>
<email>kholtta@nvidia.com</email>
</author>
<published>2020-07-29T05:48:03+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvgpu.git/commit/?id=cd134bb198d7138a3c2fcb17d11f2eedf934e2c4'/>
<id>cd134bb198d7138a3c2fcb17d11f2eedf934e2c4</id>
<content type='text'>
Running out of priv cmd buffer allocation capacity is typically a
recoverable "error" caused by extra pressure wrt. allocation sizes based
on number of inflight jobs chosen by userspace. These conditions return
-EAGAIN and further retries will succeed as long as the channel advances
with submitted jobs. Remove the unnecessary debug spew.

Bug 200641803
Bug 200651329

Change-Id: I4dfc38cfc3eb10d57ac11c1b7164c3d84f9034d3
Signed-off-by: Konsta Hölttä &lt;kholtta@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2388799
(cherry picked from commit 29ad324f8226ed3326f5de9117b9115a15cdd032)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2410069
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Running out of priv cmd buffer allocation capacity is typically a
recoverable "error" caused by extra pressure wrt. allocation sizes based
on number of inflight jobs chosen by userspace. These conditions return
-EAGAIN and further retries will succeed as long as the channel advances
with submitted jobs. Remove the unnecessary debug spew.

Bug 200641803
Bug 200651329

Change-Id: I4dfc38cfc3eb10d57ac11c1b7164c3d84f9034d3
Signed-off-by: Konsta Hölttä &lt;kholtta@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2388799
(cherry picked from commit 29ad324f8226ed3326f5de9117b9115a15cdd032)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2410069
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Deepak Nibade &lt;dnibade@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
</feed>
