mc2-scripts-and-benchmarks.git - Benchmarks and execution scripts for testing spatial isolation and SMT interference in MC^2

path: root/SD-VBS/cycles/disparity/C_cif.txt

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author	Joshua Bakita <jbakita@cs.unc.edu>	2021-03-08 19:27:22 -0500
committer	Joshua Bakita <jbakita@cs.unc.edu>	2021-03-08 19:27:22 -0500
commit	797a8e9b732cd93e907a97ab75ebbc1742031bd2 (patch)
tree	08bcf96441148b0da7789891f3488f7f4bb31f2b /SD-VBS/cycles/disparity/C_cif.txt
parent	30a82090ec1fe3292881da931a320ea3a168cfba (diff)

Case Study: Temporary paired task workaround

Diffstat (limited to 'SD-VBS/cycles/disparity/C_cif.txt')

0 files changed, 0 insertions, 0 deletions

* the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #ifndef NVGPU_PMUIF_GPMUIFTHERMSENSOR_H #define NVGPU_PMUIF_GPMUIFTHERMSENSOR_H #include "ctrl/ctrltherm.h" #include "gpmuifboardobj.h" #include <nvgpu/flcnif_cmn.h> #define NV_PMU_THERM_BOARDOBJGRP_CLASS_ID_THERM_DEVICE 0x00 #define NV_PMU_THERM_BOARDOBJGRP_CLASS_ID_THERM_CHANNEL 0x01 #define NV_PMU_THERM_CMD_ID_BOARDOBJ_GRP_SET 0x0000000B #define NV_PMU_THERM_MSG_ID_BOARDOBJ_GRP_SET 0x00000008 struct nv_pmu_therm_therm_device_boardobjgrp_set_header { struct nv_pmu_boardobjgrp_e32 super; }; struct nv_pmu_therm_therm_device_boardobj_set { struct nv_pmu_boardobj super; }; struct nv_pmu_therm_therm_device_gpu_gpc_tsosc_boardobj_set { struct nv_pmu_therm_therm_device_boardobj_set super; u8 gpc_tsosc_idx; }; struct nv_pmu_therm_therm_device_gpu_sci_boardobj_set { struct nv_pmu_therm_therm_device_boardobj_set super; }; struct nv_pmu_therm_therm_device_i2c_boardobj_set { struct nv_pmu_therm_therm_device_boardobj_set super; u8 i2c_dev_idx; }; struct nv_pmu_therm_therm_device_hbm2_site_boardobj_set { struct nv_pmu_therm_therm_device_boardobj_set super; u8 site_idx; }; struct nv_pmu_therm_therm_device_hbm2_combined_boardobj_set { struct nv_pmu_therm_therm_device_boardobj_set super; }; union nv_pmu_therm_therm_device_boardobj_set_union { struct nv_pmu_boardobj board_obj; struct nv_pmu_therm_therm_device_boardobj_set therm_device; struct nv_pmu_therm_therm_device_gpu_gpc_tsosc_boardobj_set gpu_gpc_tsosc; struct nv_pmu_therm_therm_device_gpu_sci_boardobj_set gpu_sci; struct nv_pmu_therm_therm_device_i2c_boardobj_set i2c; struct nv_pmu_therm_therm_device_hbm2_site_boardobj_set hbm2_site; struct nv_pmu_therm_therm_device_hbm2_combined_boardobj_set hbm2_combined; }; NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(therm, therm_device); struct nv_pmu_therm_therm_channel_boardobjgrp_set_header { struct nv_pmu_boardobjgrp_e32 super; }; struct nv_pmu_therm_therm_channel_boardobj_set { struct nv_pmu_boardobj super; s16 scaling; s16 offset; s32 temp_min; s32 temp_max; }; struct nv_pmu_therm_therm_channel_device_boardobj_set { struct nv_pmu_therm_therm_channel_boardobj_set super; u8 therm_dev_idx; u8 therm_dev_prov_idx; }; union nv_pmu_therm_therm_channel_boardobj_set_union { struct nv_pmu_boardobj board_obj; struct nv_pmu_therm_therm_channel_boardobj_set therm_channel; struct nv_pmu_therm_therm_channel_device_boardobj_set device; }; NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(therm, therm_channel); #endif /* NVGPU_PMUIF_GPMUIFTHERMSENSOR_H */


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