From a3fe3788535dd099d15e0ddca455be58e1d63156 Mon Sep 17 00:00:00 2001 From: Joshua Bakita Date: Thu, 29 Jun 2023 17:09:54 -0400 Subject: Hacky support for Linux 5.6+ and the Jetson AGX Orin Works around change in parameters to proc initialization functions via a hacky function which rewrites the layout. This also required making all the struct file_operations writable. Also start reducing dependency on nvgpu headers. Known issues: - Incorrect message printed in log after module is loaded. Unclear if this is because the register detection logic is broken, or if the layout of the data at NV_MC_BOOT_0 has changed. - Not tested --- nvdebug.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'nvdebug.h') diff --git a/nvdebug.h b/nvdebug.h index 1882756..968a60b 100644 --- a/nvdebug.h +++ b/nvdebug.h @@ -4,8 +4,10 @@ // TODO(jbakita): Don't depend on these. #include // For struct gk20a -#include // For struct nvgpu_os_linux #include // For PDE_DATA() macro +#include // For dev_get_drvdata() +#include // For KERNEL_VERSION and LINUX_VERSION_CODE +#include /* Runlist Channel A timeslice group (TSG) is composed of channels. Each channel is a FIFO queue @@ -943,7 +945,17 @@ static inline int file2parentgpuidx(const struct file *f) { return (uintptr_t)PDE_DATA(file_dentry(f)->d_parent->d_inode); } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) +// Commit 643eb158a3 in nvgpu moved the mapped registers to the second entry +// of the gk20a struct (after a function pointer). This change was made as L4T +// was upgraded from Linux 4.9 to 5.10 (r32 -> r34+) +// Note that this is wrong if nvgpu was built without CONFIG_NVGPU_NON_FUSA +// i.e. if FUSA was enabled, this is wrong. +#define gk20a_regs(gk20a) ((void*)gk20a + sizeof(void(*)(void))) +#else +#include // For struct nvgpu_os_linux, which holds regs #define gk20a_regs(gk20a) (container_of(gk20a, struct nvgpu_os_linux, g)->regs) +#endif // Similar to nvgpu_readl() // (except we don't try to resolve situations where regs is NULL) -- cgit v1.2.2