From f347fde22f1297e4f022600d201780d5ead78114 Mon Sep 17 00:00:00 2001 From: Joshua Bakita Date: Wed, 25 Sep 2024 16:09:09 -0400 Subject: Delete no-longer-needed nvgpu headers The dependency on these was removed in commit 8340d234. --- include/volt/volt.h | 39 --- include/volt/volt_dev.c | 609 --------------------------------------------- include/volt/volt_dev.h | 77 ------ include/volt/volt_pmu.c | 384 ---------------------------- include/volt/volt_pmu.h | 46 ---- include/volt/volt_policy.c | 513 -------------------------------------- include/volt/volt_policy.h | 80 ------ include/volt/volt_rail.c | 485 ------------------------------------ include/volt/volt_rail.h | 90 ------- 9 files changed, 2323 deletions(-) delete mode 100644 include/volt/volt.h delete mode 100644 include/volt/volt_dev.c delete mode 100644 include/volt/volt_dev.h delete mode 100644 include/volt/volt_pmu.c delete mode 100644 include/volt/volt_pmu.h delete mode 100644 include/volt/volt_policy.c delete mode 100644 include/volt/volt_policy.h delete mode 100644 include/volt/volt_rail.c delete mode 100644 include/volt/volt_rail.h (limited to 'include/volt') diff --git a/include/volt/volt.h b/include/volt/volt.h deleted file mode 100644 index 8b4895f..0000000 --- a/include/volt/volt.h +++ /dev/null @@ -1,39 +0,0 @@ -/* -* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. -* - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. -*/ - -#ifndef NVGPU_VOLT_H -#define NVGPU_VOLT_H - -#include "volt_rail.h" -#include "volt_dev.h" -#include "volt_policy.h" -#include "volt_pmu.h" - -#define VOLTAGE_DESCRIPTOR_TABLE_ENTRY_INVALID 0xFF - -struct obj_volt { - struct voltage_rail_metadata volt_rail_metadata; - struct voltage_device_metadata volt_dev_metadata; - struct voltage_policy_metadata volt_policy_metadata; -}; - -#endif /* NVGPU_VOLT_H */ diff --git a/include/volt/volt_dev.c b/include/volt/volt_dev.c deleted file mode 100644 index bb5d182..0000000 --- a/include/volt/volt_dev.c +++ /dev/null @@ -1,609 +0,0 @@ -/* - * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include -#include -#include -#include -#include -#include - -#include "gp106/bios_gp106.h" - -#include "boardobj/boardobjgrp.h" -#include "boardobj/boardobjgrp_e32.h" -#include "ctrl/ctrlvolt.h" - -#include "volt.h" - -#define VOLT_DEV_PWM_VOLTAGE_STEPS_INVALID 0U -#define VOLT_DEV_PWM_VOLTAGE_STEPS_DEFAULT 1U - -static int volt_device_pmu_data_init_super(struct gk20a *g, - struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) -{ - int status; - struct voltage_device *pdev; - struct nv_pmu_volt_volt_device_boardobj_set *pset; - - status = boardobj_pmudatainit_super(g, pboard_obj, ppmudata); - if (status) { - return status; - } - - pdev = (struct voltage_device *)pboard_obj; - pset = (struct nv_pmu_volt_volt_device_boardobj_set *)ppmudata; - - pset->switch_delay_us = pdev->switch_delay_us; - pset->voltage_min_uv = pdev->voltage_min_uv; - pset->voltage_max_uv = pdev->voltage_max_uv; - pset->volt_step_uv = pdev->volt_step_uv; - - return status; -} - -static int volt_device_pmu_data_init_pwm(struct gk20a *g, - struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) -{ - int status = 0; - struct voltage_device_pwm *pdev; - struct nv_pmu_volt_volt_device_pwm_boardobj_set *pset; - - status = volt_device_pmu_data_init_super(g, pboard_obj, ppmudata); - if (status) { - return status; - } - - pdev = (struct voltage_device_pwm *)pboard_obj; - pset = (struct nv_pmu_volt_volt_device_pwm_boardobj_set *)ppmudata; - - pset->raw_period = pdev->raw_period; - pset->voltage_base_uv = pdev->voltage_base_uv; - pset->voltage_offset_scale_uv = pdev->voltage_offset_scale_uv; - pset->pwm_source = pdev->source; - - return status; -} - -static int construct_volt_device(struct gk20a *g, - struct boardobj **ppboardobj, u16 size, void *pargs) -{ - struct voltage_device *ptmp_dev = (struct voltage_device *)pargs; - struct voltage_device *pvolt_dev = NULL; - int status = 0; - - status = boardobj_construct_super(g, ppboardobj, size, pargs); - if (status) { - return status; - } - - pvolt_dev = (struct voltage_device *)*ppboardobj; - - pvolt_dev->volt_domain = ptmp_dev->volt_domain; - pvolt_dev->i2c_dev_idx = ptmp_dev->i2c_dev_idx; - pvolt_dev->switch_delay_us = ptmp_dev->switch_delay_us; - pvolt_dev->rsvd_0 = VOLTAGE_DESCRIPTOR_TABLE_ENTRY_INVALID; - pvolt_dev->rsvd_1 = - VOLTAGE_DESCRIPTOR_TABLE_ENTRY_INVALID; - pvolt_dev->operation_type = ptmp_dev->operation_type; - pvolt_dev->voltage_min_uv = ptmp_dev->voltage_min_uv; - pvolt_dev->voltage_max_uv = ptmp_dev->voltage_max_uv; - - pvolt_dev->super.pmudatainit = volt_device_pmu_data_init_super; - - return status; -} - -static int construct_pwm_volt_device(struct gk20a *g, - struct boardobj **ppboardobj, - u16 size, void *pargs) -{ - struct boardobj *pboard_obj = NULL; - struct voltage_device_pwm *ptmp_dev = - (struct voltage_device_pwm *)pargs; - struct voltage_device_pwm *pdev = NULL; - int status = 0; - - status = construct_volt_device(g, ppboardobj, size, pargs); - if (status) { - return status; - } - - pboard_obj = (*ppboardobj); - pdev = (struct voltage_device_pwm *)*ppboardobj; - - pboard_obj->pmudatainit = volt_device_pmu_data_init_pwm; - - /* Set VOLTAGE_DEVICE_PWM-specific parameters */ - pdev->voltage_base_uv = ptmp_dev->voltage_base_uv; - pdev->voltage_offset_scale_uv = ptmp_dev->voltage_offset_scale_uv; - pdev->source = ptmp_dev->source; - pdev->raw_period = ptmp_dev->raw_period; - - return status; -} - - -static struct voltage_device_entry *volt_dev_construct_dev_entry_pwm( - struct gk20a *g, - u32 voltage_uv, void *pargs) -{ - struct voltage_device_pwm_entry *pentry = NULL; - struct voltage_device_pwm_entry *ptmp_entry = - (struct voltage_device_pwm_entry *)pargs; - - pentry = nvgpu_kzalloc(g, sizeof(struct voltage_device_pwm_entry)); - if (pentry == NULL) { - return NULL; - } - - memset(pentry, 0, sizeof(struct voltage_device_pwm_entry)); - - pentry->super.voltage_uv = voltage_uv; - pentry->duty_cycle = ptmp_entry->duty_cycle; - - return (struct voltage_device_entry *)pentry; -} - -static u8 volt_dev_operation_type_convert(u8 vbios_type) -{ - switch (vbios_type) { - case NV_VBIOS_VDT_1X_ENTRY_PARAM1_PSV_OPERATION_TYPE_DEFAULT: - return CTRL_VOLT_DEVICE_OPERATION_TYPE_DEFAULT; - - case NV_VBIOS_VDT_1X_ENTRY_PARAM1_PSV_OPERATION_TYPE_LPWR_STEADY_STATE: - return CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_STEADY_STATE; - - case NV_VBIOS_VDT_1X_ENTRY_PARAM1_PSV_OPERATION_TYPE_LPWR_SLEEP_STATE: - return CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_SLEEP_STATE; - } - - return CTRL_VOLT_DEVICE_OPERATION_TYPE_INVALID; -} - -static struct voltage_device *volt_volt_device_construct(struct gk20a *g, - void *pargs) -{ - struct boardobj *pboard_obj = NULL; - - if (BOARDOBJ_GET_TYPE(pargs) == CTRL_VOLT_DEVICE_TYPE_PWM) { - int status = construct_pwm_volt_device(g, &pboard_obj, - sizeof(struct voltage_device_pwm), pargs); - if (status) { - nvgpu_err(g, - " Could not allocate memory for VOLTAGE_DEVICE type (%x).", - BOARDOBJ_GET_TYPE(pargs)); - pboard_obj = NULL; - } - } - - return (struct voltage_device *)pboard_obj; -} - -static int volt_get_voltage_device_table_1x_psv(struct gk20a *g, - struct vbios_voltage_device_table_1x_entry *p_bios_entry, - struct voltage_device_metadata *p_Volt_Device_Meta_Data, - u8 entry_Idx) -{ - int status = 0; - u32 entry_cnt = 0; - struct voltage_device *pvolt_dev = NULL; - struct voltage_device_pwm *pvolt_dev_pwm = NULL; - struct voltage_device_pwm *ptmp_dev = NULL; - u32 duty_cycle; - u32 frequency_hz; - u32 voltage_uv; - u8 ext_dev_idx; - u8 steps; - u8 volt_domain = 0; - struct voltage_device_pwm_entry pwm_entry = { { 0 } }; - - ptmp_dev = nvgpu_kzalloc(g, sizeof(struct voltage_device_pwm)); - if (ptmp_dev == NULL) { - return -ENOMEM; - } - - frequency_hz = (u32)BIOS_GET_FIELD(p_bios_entry->param0, - NV_VBIOS_VDT_1X_ENTRY_PARAM0_PSV_INPUT_FREQUENCY); - - ext_dev_idx = (u8)BIOS_GET_FIELD(p_bios_entry->param0, - NV_VBIOS_VDT_1X_ENTRY_PARAM0_PSV_EXT_DEVICE_INDEX); - - ptmp_dev->super.operation_type = volt_dev_operation_type_convert( - (u8)BIOS_GET_FIELD(p_bios_entry->param1, - NV_VBIOS_VDT_1X_ENTRY_PARAM1_PSV_OPERATION_TYPE)); - - if (ptmp_dev->super.operation_type == - CTRL_VOLT_DEVICE_OPERATION_TYPE_INVALID) { - nvgpu_err(g, " Invalid Voltage Device Operation Type."); - - status = -EINVAL; - goto done; - } - - ptmp_dev->super.voltage_min_uv = - (u32)BIOS_GET_FIELD(p_bios_entry->param1, - NV_VBIOS_VDT_1X_ENTRY_PARAM1_PSV_VOLTAGE_MINIMUM); - - ptmp_dev->super.voltage_max_uv = - (u32)BIOS_GET_FIELD(p_bios_entry->param2, - NV_VBIOS_VDT_1X_ENTRY_PARAM2_PSV_VOLTAGE_MAXIMUM); - - ptmp_dev->voltage_base_uv = BIOS_GET_FIELD(p_bios_entry->param3, - NV_VBIOS_VDT_1X_ENTRY_PARAM3_PSV_VOLTAGE_BASE); - - steps = (u8)BIOS_GET_FIELD(p_bios_entry->param3, - NV_VBIOS_VDT_1X_ENTRY_PARAM3_PSV_VOLTAGE_STEPS); - if (steps == VOLT_DEV_PWM_VOLTAGE_STEPS_INVALID) { - steps = VOLT_DEV_PWM_VOLTAGE_STEPS_DEFAULT; - } - - ptmp_dev->voltage_offset_scale_uv = - BIOS_GET_FIELD(p_bios_entry->param4, - NV_VBIOS_VDT_1X_ENTRY_PARAM4_PSV_OFFSET_SCALE); - - volt_domain = volt_rail_vbios_volt_domain_convert_to_internal(g, - (u8)p_bios_entry->volt_domain); - if (volt_domain == CTRL_VOLT_DOMAIN_INVALID) { - nvgpu_err(g, "invalid voltage domain = %d", - (u8)p_bios_entry->volt_domain); - status = -EINVAL; - goto done; - } - - if (ptmp_dev->super.operation_type == - CTRL_VOLT_DEVICE_OPERATION_TYPE_DEFAULT) { - if (volt_domain == CTRL_VOLT_DOMAIN_LOGIC) { - ptmp_dev->source = - NV_PMU_PMGR_PWM_SOURCE_THERM_VID_PWM_0; - } - if (volt_domain == CTRL_VOLT_DOMAIN_SRAM) { - ptmp_dev->source = - NV_PMU_PMGR_PWM_SOURCE_THERM_VID_PWM_1; - } - ptmp_dev->raw_period = - g->ops.clk.get_crystal_clk_hz(g) / frequency_hz; - } else if (ptmp_dev->super.operation_type == - CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_STEADY_STATE) { - ptmp_dev->source = NV_PMU_PMGR_PWM_SOURCE_RSVD_0; - ptmp_dev->raw_period = 0; - } else if (ptmp_dev->super.operation_type == - CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_SLEEP_STATE) { - ptmp_dev->source = NV_PMU_PMGR_PWM_SOURCE_RSVD_1; - ptmp_dev->raw_period = 0; - } - - /* Initialize data for parent class. */ - ptmp_dev->super.super.type = CTRL_VOLT_DEVICE_TYPE_PWM; - ptmp_dev->super.volt_domain = volt_domain; - ptmp_dev->super.i2c_dev_idx = ext_dev_idx; - ptmp_dev->super.switch_delay_us = (u16)p_bios_entry->settle_time_us; - - pvolt_dev = volt_volt_device_construct(g, ptmp_dev); - if (pvolt_dev == NULL) { - nvgpu_err(g, " Failure to construct VOLTAGE_DEVICE object."); - - status = -EINVAL; - goto done; - } - - status = boardobjgrp_objinsert( - &p_Volt_Device_Meta_Data->volt_devices.super, - (struct boardobj *)pvolt_dev, entry_Idx); - if (status) { - nvgpu_err(g, - "could not add VOLTAGE_DEVICE for entry %d into boardobjgrp ", - entry_Idx); - goto done; - } - - pvolt_dev_pwm = (struct voltage_device_pwm *)pvolt_dev; - - duty_cycle = 0; - do { - voltage_uv = (u32)(pvolt_dev_pwm->voltage_base_uv + - (s32)((((s64)((s32)duty_cycle)) * - pvolt_dev_pwm->voltage_offset_scale_uv) - / ((s64)((s32) pvolt_dev_pwm->raw_period)))); - - /* Skip creating entry for invalid voltage. */ - if ((voltage_uv >= pvolt_dev_pwm->super.voltage_min_uv) && - (voltage_uv <= pvolt_dev_pwm->super.voltage_max_uv)) { - if (pvolt_dev_pwm->voltage_offset_scale_uv < 0) { - pwm_entry.duty_cycle = - pvolt_dev_pwm->raw_period - duty_cycle; - } else { - pwm_entry.duty_cycle = duty_cycle; - } - - /* Check if there is room left in the voltage table. */ - if (entry_cnt == VOLTAGE_TABLE_MAX_ENTRIES) { - nvgpu_err(g, "Voltage table is full"); - status = -EINVAL; - goto done; - } - - pvolt_dev->pentry[entry_cnt] = - volt_dev_construct_dev_entry_pwm(g, - voltage_uv, &pwm_entry); - if (pvolt_dev->pentry[entry_cnt] == NULL) { - nvgpu_err(g, - " Error creating voltage_device_pwm_entry!"); - status = -EINVAL; - goto done; - } - - entry_cnt++; - } - - /* Obtain next value after the specified steps. */ - duty_cycle = duty_cycle + (u32)steps; - - /* Cap duty cycle to PWM period. */ - if (duty_cycle > pvolt_dev_pwm->raw_period) { - duty_cycle = pvolt_dev_pwm->raw_period; - } - - } while (duty_cycle < pvolt_dev_pwm->raw_period); - -done: - if (pvolt_dev != NULL) { - pvolt_dev->num_entries = entry_cnt; - } - - nvgpu_kfree(g, ptmp_dev); - return status; -} - -static u32 volt_get_volt_devices_table(struct gk20a *g, - struct voltage_device_metadata *pvolt_device_metadata) -{ - u32 status = 0; - u8 *volt_device_table_ptr = NULL; - struct vbios_voltage_device_table_1x_header header = { 0 }; - struct vbios_voltage_device_table_1x_entry entry = { 0 }; - u8 entry_idx; - u8 *entry_offset; - - volt_device_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g, - g->bios.perf_token, VOLTAGE_DEVICE_TABLE); - if (volt_device_table_ptr == NULL) { - status = -EINVAL; - goto done; - } - - memcpy(&header, volt_device_table_ptr, - sizeof(struct vbios_voltage_device_table_1x_header)); - - /* Read in the entries. */ - for (entry_idx = 0; entry_idx < header.num_table_entries; entry_idx++) { - entry_offset = (volt_device_table_ptr + header.header_size + - (entry_idx * header.table_entry_size)); - - memcpy(&entry, entry_offset, - sizeof(struct vbios_voltage_device_table_1x_entry)); - - if (entry.type == NV_VBIOS_VOLTAGE_DEVICE_1X_ENTRY_TYPE_PSV) { - status = volt_get_voltage_device_table_1x_psv(g, - &entry, pvolt_device_metadata, - entry_idx); - } - } - -done: - return status; -} - -static int _volt_device_devgrp_pmudata_instget(struct gk20a *g, - struct nv_pmu_boardobjgrp *pmuboardobjgrp, - struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) -{ - struct nv_pmu_volt_volt_device_boardobj_grp_set *pgrp_set = - (struct nv_pmu_volt_volt_device_boardobj_grp_set *) - pmuboardobjgrp; - - nvgpu_log_info(g, " "); - - /*check whether pmuboardobjgrp has a valid boardobj in index*/ - if (((u32)BIT(idx) & - pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0U) { - return -EINVAL; - } - - *ppboardobjpmudata = (struct nv_pmu_boardobj *) - &pgrp_set->objects[idx].data.board_obj; - nvgpu_log_info(g, "Done"); - return 0; -} - -static int _volt_device_devgrp_pmustatus_instget(struct gk20a *g, - void *pboardobjgrppmu, - struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) -{ - struct nv_pmu_volt_volt_device_boardobj_grp_get_status *pgrp_get_status - = (struct nv_pmu_volt_volt_device_boardobj_grp_get_status *) - pboardobjgrppmu; - - /*check whether pmuboardobjgrp has a valid boardobj in index*/ - if (((u32)BIT(idx) & - pgrp_get_status->hdr.data.super.obj_mask.super.data[0]) == 0U) { - return -EINVAL; - } - - *ppboardobjpmustatus = (struct nv_pmu_boardobj_query *) - &pgrp_get_status->objects[idx].data.board_obj; - return 0; -} - -static int volt_device_volt_cmp(const void *a, const void *b) -{ - const struct voltage_device_entry *a_entry = *(const struct voltage_device_entry **)a; - const struct voltage_device_entry *b_entry = *(const struct voltage_device_entry **)b; - - return (int)a_entry->voltage_uv - (int)b_entry->voltage_uv; -} - -static u32 volt_device_state_init(struct gk20a *g, - struct voltage_device *pvolt_dev) -{ - u32 status = 0; - struct voltage_rail *pRail = NULL; - u8 rail_idx = 0; - - sort(pvolt_dev->pentry, pvolt_dev->num_entries, - sizeof(*pvolt_dev->pentry), volt_device_volt_cmp, - NULL); - - /* Initialize VOLT_DEVICE step size. */ - if (pvolt_dev->num_entries <= VOLTAGE_TABLE_MAX_ENTRIES_ONE) { - pvolt_dev->volt_step_uv = NV_PMU_VOLT_VALUE_0V_IN_UV; - } else { - pvolt_dev->volt_step_uv = (pvolt_dev->pentry[1]->voltage_uv - - pvolt_dev->pentry[0]->voltage_uv); - } - - /* Build VOLT_RAIL SW state from VOLT_DEVICE SW state. */ - /* If VOLT_RAIL isn't supported, exit. */ - if (VOLT_RAIL_VOLT_3X_SUPPORTED(&g->perf_pmu.volt)) { - rail_idx = volt_rail_volt_domain_convert_to_idx(g, - pvolt_dev->volt_domain); - if (rail_idx == CTRL_BOARDOBJ_IDX_INVALID) { - nvgpu_err(g, - " could not convert voltage domain to rail index."); - status = -EINVAL; - goto done; - } - - pRail = VOLT_GET_VOLT_RAIL(&g->perf_pmu.volt, rail_idx); - if (pRail == NULL) { - nvgpu_err(g, - "could not obtain ptr to rail object from rail index"); - status = -EINVAL; - goto done; - } - - status = volt_rail_volt_dev_register(g, pRail, - BOARDOBJ_GET_IDX(pvolt_dev), pvolt_dev->operation_type); - if (status) { - nvgpu_err(g, - "Failed to register the device with rail obj"); - goto done; - } - } - -done: - if (status) { - nvgpu_err(g, "Error in building rail sw state device sw"); - } - - return status; -} - -int volt_dev_pmu_setup(struct gk20a *g) -{ - int status; - struct boardobjgrp *pboardobjgrp = NULL; - - nvgpu_log_info(g, " "); - - pboardobjgrp = &g->perf_pmu.volt.volt_dev_metadata.volt_devices.super; - - if (!pboardobjgrp->bconstructed) { - return -EINVAL; - } - - status = pboardobjgrp->pmuinithandle(g, pboardobjgrp); - - nvgpu_log_info(g, "Done"); - return status; -} - -u32 volt_dev_sw_setup(struct gk20a *g) -{ - u32 status = 0; - struct boardobjgrp *pboardobjgrp = NULL; - struct voltage_device *pvolt_device; - u8 i; - - nvgpu_log_info(g, " "); - - status = boardobjgrpconstruct_e32(g, - &g->perf_pmu.volt.volt_dev_metadata.volt_devices); - if (status) { - nvgpu_err(g, - "error creating boardobjgrp for volt rail, status - 0x%x", - status); - goto done; - } - - pboardobjgrp = &g->perf_pmu.volt.volt_dev_metadata.volt_devices.super; - - pboardobjgrp->pmudatainstget = _volt_device_devgrp_pmudata_instget; - pboardobjgrp->pmustatusinstget = _volt_device_devgrp_pmustatus_instget; - - /* Obtain Voltage Rail Table from VBIOS */ - status = volt_get_volt_devices_table(g, &g->perf_pmu.volt. - volt_dev_metadata); - if (status) { - goto done; - } - - /* Populate data for the VOLT_RAIL PMU interface */ - BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, VOLT, VOLT_DEVICE); - - status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, - volt, VOLT, volt_device, VOLT_DEVICE); - if (status) { - nvgpu_err(g, - "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", - status); - goto done; - } - - status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g, - &g->perf_pmu.volt.volt_dev_metadata.volt_devices.super, - volt, VOLT, volt_device, VOLT_DEVICE); - if (status) { - nvgpu_err(g, - "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", - status); - goto done; - } - - /* update calibration to fuse */ - BOARDOBJGRP_FOR_EACH(&(g->perf_pmu.volt.volt_dev_metadata.volt_devices. - super), - struct voltage_device *, pvolt_device, i) { - status = volt_device_state_init(g, pvolt_device); - if (status) { - nvgpu_err(g, - "failure while executing devices's state init interface"); - nvgpu_err(g, - " railIdx = %d, status = 0x%x", i, status); - goto done; - } - } - -done: - nvgpu_log_info(g, " done status %x", status); - return status; -} diff --git a/include/volt/volt_dev.h b/include/volt/volt_dev.h deleted file mode 100644 index 48d93ae..0000000 --- a/include/volt/volt_dev.h +++ /dev/null @@ -1,77 +0,0 @@ -/* -* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. -* - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. -*/ - -#ifndef NVGPU_VOLT_DEV_H -#define NVGPU_VOLT_DEV_H - -#include "boardobj/boardobj.h" -#include "boardobj/boardobjgrp.h" -#include "ctrl/ctrlvolt.h" - -#define VOLTAGE_TABLE_MAX_ENTRIES_ONE 1U -#define VOLTAGE_TABLE_MAX_ENTRIES 256U - -struct voltage_device { - struct boardobj super; - u8 volt_domain; - u8 i2c_dev_idx; - u32 switch_delay_us; - u32 num_entries; - struct voltage_device_entry *pentry[VOLTAGE_TABLE_MAX_ENTRIES]; - struct voltage_device_entry *pcurr_entry; - u8 rsvd_0; - u8 rsvd_1; - u8 operation_type; - u32 voltage_min_uv; - u32 voltage_max_uv; - u32 volt_step_uv; -}; - -struct voltage_device_entry { - u32 voltage_uv; -}; - -struct voltage_device_metadata { - struct boardobjgrp_e32 volt_devices; -}; - -/*! - * Extends VOLTAGE_DEVICE providing attributes specific to PWM controllers. - */ -struct voltage_device_pwm { - struct voltage_device super; - s32 voltage_base_uv; - s32 voltage_offset_scale_uv; - enum nv_pmu_pmgr_pwm_source source; - u32 raw_period; -}; - -struct voltage_device_pwm_entry { - struct voltage_device_entry super; - u32 duty_cycle; -}; -/* PWM end */ - -u32 volt_dev_sw_setup(struct gk20a *g); -int volt_dev_pmu_setup(struct gk20a *g); - -#endif /* NVGPU_VOLT_DEV_H */ diff --git a/include/volt/volt_pmu.c b/include/volt/volt_pmu.c deleted file mode 100644 index 2249ae2..0000000 --- a/include/volt/volt_pmu.c +++ /dev/null @@ -1,384 +0,0 @@ -/* - * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include -#include -#include - -#include "boardobj/boardobjgrp.h" -#include "boardobj/boardobjgrp_e32.h" -#include "gp106/bios_gp106.h" -#include "ctrl/ctrlvolt.h" -#include "ctrl/ctrlperf.h" - -#include "volt.h" - -#define RAIL_COUNT_GP 2 -#define RAIL_COUNT_GV 1 - -struct volt_rpc_pmucmdhandler_params { - struct nv_pmu_volt_rpc *prpc_call; - u32 success; -}; - -static void volt_rpc_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, - void *param, u32 handle, u32 status) -{ - struct volt_rpc_pmucmdhandler_params *phandlerparams = - (struct volt_rpc_pmucmdhandler_params *)param; - - nvgpu_log_info(g, " "); - - if (msg->msg.volt.msg_type != NV_PMU_VOLT_MSG_ID_RPC) { - nvgpu_err(g, "unsupported msg for VOLT RPC %x", - msg->msg.volt.msg_type); - return; - } - - if (phandlerparams->prpc_call->b_supported) { - phandlerparams->success = 1; - } -} - - -static u32 volt_pmu_rpc_execute(struct gk20a *g, - struct nv_pmu_volt_rpc *prpc_call) -{ - struct pmu_cmd cmd; - struct pmu_msg msg; - struct pmu_payload payload; - u32 status = 0; - u32 seqdesc; - struct volt_rpc_pmucmdhandler_params handler; - - memset(&payload, 0, sizeof(struct pmu_payload)); - memset(&cmd, 0, sizeof(struct pmu_cmd)); - memset(&msg, 0, sizeof(struct pmu_msg)); - memset(&handler, 0, sizeof(struct volt_rpc_pmucmdhandler_params)); - - cmd.hdr.unit_id = PMU_UNIT_VOLT; - cmd.hdr.size = (u32)sizeof(struct nv_pmu_volt_cmd) + - (u32)sizeof(struct pmu_hdr); - cmd.cmd.volt.cmd_type = NV_PMU_VOLT_CMD_ID_RPC; - msg.hdr.size = sizeof(struct pmu_msg); - - payload.in.buf = (u8 *)prpc_call; - payload.in.size = (u32)sizeof(struct nv_pmu_volt_rpc); - payload.in.fb_size = PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED; - payload.in.offset = NV_PMU_VOLT_CMD_RPC_ALLOC_OFFSET; - - payload.out.buf = (u8 *)prpc_call; - payload.out.size = (u32)sizeof(struct nv_pmu_volt_rpc); - payload.out.fb_size = PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED; - payload.out.offset = NV_PMU_VOLT_MSG_RPC_ALLOC_OFFSET; - - handler.prpc_call = prpc_call; - handler.success = 0; - - status = nvgpu_pmu_cmd_post(g, &cmd, NULL, &payload, - PMU_COMMAND_QUEUE_LPQ, - volt_rpc_pmucmdhandler, (void *)&handler, - &seqdesc, ~0); - if (status) { - nvgpu_err(g, "unable to post volt RPC cmd %x", - cmd.cmd.volt.cmd_type); - goto volt_pmu_rpc_execute; - } - - pmu_wait_message_cond(&g->pmu, - gk20a_get_gr_idle_timeout(g), - &handler.success, 1); - - if (handler.success == 0U) { - status = -EINVAL; - nvgpu_err(g, "rpc call to volt failed"); - } - -volt_pmu_rpc_execute: - return status; -} - -u32 nvgpu_volt_send_load_cmd_to_pmu_gp10x(struct gk20a *g) -{ - struct nv_pmu_volt_rpc rpc_call = { 0 }; - u32 status = 0; - - rpc_call.function = NV_PMU_VOLT_RPC_ID_LOAD; - - status = volt_pmu_rpc_execute(g, &rpc_call); - if (status) { - nvgpu_err(g, - "Error while executing LOAD RPC: status = 0x%08x.", - status); - } - - return status; -} - -u32 nvgpu_volt_send_load_cmd_to_pmu_gv10x(struct gk20a *g) -{ - struct nvgpu_pmu *pmu = &g->pmu; - struct nv_pmu_rpc_struct_volt_load rpc; - u32 status = 0; - - memset(&rpc, 0, sizeof(struct nv_pmu_rpc_struct_volt_load)); - PMU_RPC_EXECUTE(status, pmu, VOLT, LOAD, &rpc, 0); - if (status) { - nvgpu_err(g, "Failed to execute RPC status=0x%x", - status); - } - - return status; -} - -u32 nvgpu_volt_rail_get_voltage_gp10x(struct gk20a *g, - u8 volt_domain, u32 *pvoltage_uv) -{ - struct nv_pmu_volt_rpc rpc_call = { 0 }; - u32 status = 0; - u8 rail_idx; - - rail_idx = volt_rail_volt_domain_convert_to_idx(g, volt_domain); - if ((rail_idx == CTRL_VOLT_RAIL_INDEX_INVALID) || - (!VOLT_RAIL_INDEX_IS_VALID(&g->perf_pmu.volt, rail_idx))) { - nvgpu_err(g, - "failed: volt_domain = %d, voltage rail table = %d.", - volt_domain, rail_idx); - return -EINVAL; - } - - /* Set RPC parameters. */ - rpc_call.function = NV_PMU_VOLT_RPC_ID_VOLT_RAIL_GET_VOLTAGE; - rpc_call.params.volt_rail_get_voltage.rail_idx = rail_idx; - - /* Execute the voltage get request via PMU RPC. */ - status = volt_pmu_rpc_execute(g, &rpc_call); - if (status) { - nvgpu_err(g, - "Error while executing volt_rail_get_voltage rpc"); - return status; - } - - /* Copy out the current voltage. */ - *pvoltage_uv = rpc_call.params.volt_rail_get_voltage.voltage_uv; - - return status; -} - -u32 nvgpu_volt_rail_get_voltage_gv10x(struct gk20a *g, - u8 volt_domain, u32 *pvoltage_uv) -{ - struct nvgpu_pmu *pmu = &g->pmu; - struct nv_pmu_rpc_struct_volt_volt_rail_get_voltage rpc; - u32 status = 0; - u8 rail_idx; - - rail_idx = volt_rail_volt_domain_convert_to_idx(g, volt_domain); - if ((rail_idx == CTRL_VOLT_RAIL_INDEX_INVALID) || - (!VOLT_RAIL_INDEX_IS_VALID(&g->perf_pmu.volt, rail_idx))) { - nvgpu_err(g, - "failed: volt_domain = %d, voltage rail table = %d.", - volt_domain, rail_idx); - return -EINVAL; - } - - memset(&rpc, 0, - sizeof(struct nv_pmu_rpc_struct_volt_volt_rail_get_voltage)); - rpc.rail_idx = rail_idx; - - PMU_RPC_EXECUTE_CPB(status, pmu, VOLT, VOLT_RAIL_GET_VOLTAGE, &rpc, 0); - if (status) { - nvgpu_err(g, "Failed to execute RPC status=0x%x", - status); - } - - *pvoltage_uv = rpc.voltage_uv; - - return status; -} - -static u32 volt_policy_set_voltage(struct gk20a *g, u8 client_id, - struct ctrl_perf_volt_rail_list *prail_list) -{ - struct nv_pmu_volt_rpc rpc_call = { 0 }; - struct obj_volt *pvolt = &g->perf_pmu.volt; - u32 status = 0; - u8 policy_idx = CTRL_VOLT_POLICY_INDEX_INVALID; - u8 i = 0; - - /* Sanity check input rail list. */ - for (i = 0; i < prail_list->num_rails; i++) { - if ((prail_list->rails[i].volt_domain == - CTRL_VOLT_DOMAIN_INVALID) || - (prail_list->rails[i].voltage_uv == - NV_PMU_VOLT_VALUE_0V_IN_UV)) { - nvgpu_err(g, "Invalid voltage domain or target"); - nvgpu_err(g, " client_id = %d, listEntry = %d", - client_id, i); - nvgpu_err(g, " volt_domain = %d, voltage_uv = %d uV.", - prail_list->rails[i].volt_domain, - prail_list->rails[i].voltage_uv); - status = -EINVAL; - goto exit; - } - } - - /* Convert the client ID to index. */ - if (client_id == CTRL_VOLT_POLICY_CLIENT_PERF_CORE_VF_SEQ) { - policy_idx = - pvolt->volt_policy_metadata.perf_core_vf_seq_policy_idx; - } - else { - status = -EINVAL; - goto exit; - } - - /* Set RPC parameters. */ - rpc_call.function = NV_PMU_VOLT_RPC_ID_VOLT_POLICY_SET_VOLTAGE; - rpc_call.params.volt_policy_voltage_data.policy_idx = policy_idx; - memcpy(&rpc_call.params.volt_policy_voltage_data.rail_list, prail_list, - (sizeof(struct ctrl_perf_volt_rail_list))); - - /* Execute the voltage change request via PMU RPC. */ - status = volt_pmu_rpc_execute(g, &rpc_call); - if (status) { - nvgpu_err(g, - "Error while executing VOLT_POLICY_SET_VOLTAGE RPC"); - } - -exit: - return status; -} - -static u32 volt_set_voltage_gv10x_rpc(struct gk20a *g, u8 client_id, - struct ctrl_volt_volt_rail_list_v1 *prail_list) -{ - struct nvgpu_pmu *pmu = &g->pmu; - struct nv_pmu_rpc_struct_volt_volt_set_voltage rpc; - int status = 0; - - memset(&rpc, 0, sizeof(struct nv_pmu_rpc_struct_volt_volt_set_voltage)); - rpc.client_id = 0x1; - rpc.rail_list = *prail_list; - - PMU_RPC_EXECUTE_CPB(status, pmu, VOLT, VOLT_SET_VOLTAGE, &rpc, 0); - if (status) { - nvgpu_err(g, "Failed to execute RPC status=0x%x", - status); - } - - return status; -} - -u32 nvgpu_volt_set_voltage_gv10x(struct gk20a *g, u32 logic_voltage_uv, - u32 sram_voltage_uv) -{ - int status = 0; - struct ctrl_volt_volt_rail_list_v1 rail_list = { 0 }; - - rail_list.num_rails = RAIL_COUNT_GV; - rail_list.rails[0].rail_idx = - volt_rail_volt_domain_convert_to_idx(g, - CTRL_VOLT_DOMAIN_LOGIC); - rail_list.rails[0].voltage_uv = logic_voltage_uv; - rail_list.rails[0].voltage_min_noise_unaware_uv = logic_voltage_uv; - - status = volt_set_voltage_gv10x_rpc(g, - CTRL_VOLT_POLICY_CLIENT_PERF_CORE_VF_SEQ, &rail_list); - - return status; -} - -u32 nvgpu_volt_set_voltage_gp10x(struct gk20a *g, u32 logic_voltage_uv, - u32 sram_voltage_uv) -{ - int status = 0; - struct ctrl_perf_volt_rail_list rail_list = { 0 }; - - rail_list.num_rails = RAIL_COUNT_GP; - rail_list.rails[0].volt_domain = CTRL_VOLT_DOMAIN_LOGIC; - rail_list.rails[0].voltage_uv = logic_voltage_uv; - rail_list.rails[0].voltage_min_noise_unaware_uv = logic_voltage_uv; - rail_list.rails[1].volt_domain = CTRL_VOLT_DOMAIN_SRAM; - rail_list.rails[1].voltage_uv = sram_voltage_uv; - rail_list.rails[1].voltage_min_noise_unaware_uv = sram_voltage_uv; - - status = volt_policy_set_voltage(g, - CTRL_VOLT_POLICY_CLIENT_PERF_CORE_VF_SEQ, &rail_list); - - return status; -} - -u32 volt_set_voltage(struct gk20a *g, u32 logic_voltage_uv, u32 sram_voltage_uv) -{ - return g->ops.pmu_ver.volt.volt_set_voltage(g, - logic_voltage_uv, sram_voltage_uv); -} - -u32 volt_get_voltage(struct gk20a *g, u32 volt_domain, u32 *voltage_uv) -{ - return g->ops.pmu_ver.volt.volt_get_voltage(g, - volt_domain, voltage_uv); -} - -static int volt_policy_set_noiseaware_vmin(struct gk20a *g, - struct ctrl_volt_volt_rail_list *prail_list) -{ - struct nv_pmu_volt_rpc rpc_call = { 0 }; - u32 status = 0; - - /* Set RPC parameters. */ - rpc_call.function = NV_PMU_VOLT_RPC_ID_VOLT_RAIL_SET_NOISE_UNAWARE_VMIN; - rpc_call.params.volt_rail_set_noise_unaware_vmin.num_rails = - prail_list->num_rails; - memcpy(&rpc_call.params.volt_rail_set_noise_unaware_vmin.rail_list, - prail_list, (sizeof(struct ctrl_volt_volt_rail_list))); - - /* Execute the voltage change request via PMU RPC. */ - status = volt_pmu_rpc_execute(g, &rpc_call); - if (status) { - nvgpu_err(g, - "Error while executing VOLT_POLICY_SET_VOLTAGE RPC"); - return -EINVAL; - } - - return 0; -} - -int volt_set_noiseaware_vmin(struct gk20a *g, u32 logic_voltage_uv, - u32 sram_voltage_uv) -{ - int status = 0; - struct ctrl_volt_volt_rail_list rail_list = { 0 }; - - rail_list.num_rails = RAIL_COUNT_GP; - rail_list.rails[0].rail_idx = 0; - rail_list.rails[0].voltage_uv = logic_voltage_uv; - rail_list.rails[1].rail_idx = 1; - rail_list.rails[1].voltage_uv = sram_voltage_uv; - - status = volt_policy_set_noiseaware_vmin(g, &rail_list); - - return status; - -} - diff --git a/include/volt/volt_pmu.h b/include/volt/volt_pmu.h deleted file mode 100644 index c9fb8bf..0000000 --- a/include/volt/volt_pmu.h +++ /dev/null @@ -1,46 +0,0 @@ -/* -* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. -* - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. -*/ - -#ifndef NVGPU_VOLT_PMU_H -#define NVGPU_VOLT_PMU_H - -u32 volt_pmu_send_load_cmd_to_pmu(struct gk20a *g); -u32 volt_set_voltage(struct gk20a *g, u32 logic_voltage_uv, - u32 sram_voltage_uv); -u32 volt_get_voltage(struct gk20a *g, u32 volt_domain, u32 *voltage_uv); -int volt_set_noiseaware_vmin(struct gk20a *g, u32 logic_voltage_uv, - u32 sram_voltage_uv); - -u32 nvgpu_volt_set_voltage_gp10x(struct gk20a *g, u32 logic_voltage_uv, - u32 sram_voltage_uv); -u32 nvgpu_volt_rail_get_voltage_gp10x(struct gk20a *g, - u8 volt_domain, u32 *pvoltage_uv); -u32 nvgpu_volt_send_load_cmd_to_pmu_gp10x(struct gk20a *g); - -u32 nvgpu_volt_set_voltage_gv10x(struct gk20a *g, u32 logic_voltage_uv, - u32 sram_voltage_uv); -u32 nvgpu_volt_rail_get_voltage_gv10x(struct gk20a *g, - u8 volt_domain, u32 *pvoltage_uv); -u32 nvgpu_volt_send_load_cmd_to_pmu_gv10x(struct gk20a *g); - - -#endif /* NVGPU_VOLT_PMU_H */ diff --git a/include/volt/volt_policy.c b/include/volt/volt_policy.c deleted file mode 100644 index cc60730..0000000 --- a/include/volt/volt_policy.c +++ /dev/null @@ -1,513 +0,0 @@ -/* - * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include -#include - -#include "boardobj/boardobjgrp.h" -#include "boardobj/boardobjgrp_e32.h" -#include "gp106/bios_gp106.h" -#include "ctrl/ctrlvolt.h" - -#include "volt.h" - -static int volt_policy_pmu_data_init_super(struct gk20a *g, - struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) -{ - return boardobj_pmudatainit_super(g, pboardobj, ppmudata); -} - -static int construct_volt_policy(struct gk20a *g, - struct boardobj **ppboardobj, u16 size, void *pArgs) -{ - struct voltage_policy *pvolt_policy = NULL; - int status = 0; - - status = boardobj_construct_super(g, ppboardobj, size, pArgs); - if (status) { - return status; - } - - pvolt_policy = (struct voltage_policy *)*ppboardobj; - - pvolt_policy->super.pmudatainit = volt_policy_pmu_data_init_super; - - return status; -} - -static int construct_volt_policy_split_rail(struct gk20a *g, - struct boardobj **ppboardobj, u16 size, void *pArgs) -{ - struct voltage_policy_split_rail *ptmp_policy = - (struct voltage_policy_split_rail *)pArgs; - struct voltage_policy_split_rail *pvolt_policy = NULL; - int status = 0; - - status = construct_volt_policy(g, ppboardobj, size, pArgs); - if (status) { - return status; - } - - pvolt_policy = (struct voltage_policy_split_rail *)*ppboardobj; - - pvolt_policy->rail_idx_master = ptmp_policy->rail_idx_master; - pvolt_policy->rail_idx_slave = ptmp_policy->rail_idx_slave; - pvolt_policy->delta_min_vfe_equ_idx = - ptmp_policy->delta_min_vfe_equ_idx; - pvolt_policy->delta_max_vfe_equ_idx = - ptmp_policy->delta_max_vfe_equ_idx; - - return status; -} - -static int construct_volt_policy_single_rail(struct gk20a *g, - struct boardobj **ppboardobj, u16 size, void *pArgs) -{ - struct voltage_policy_single_rail *ptmp_policy = - (struct voltage_policy_single_rail *)pArgs; - struct voltage_policy_single_rail *pvolt_policy = NULL; - int status = 0; - - status = construct_volt_policy(g, ppboardobj, size, pArgs); - if (status) { - return status; - } - - pvolt_policy = (struct voltage_policy_single_rail *)*ppboardobj; - - pvolt_policy->rail_idx = ptmp_policy->rail_idx; - - return status; -} - -static int volt_policy_pmu_data_init_single_rail(struct gk20a *g, - struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) -{ - int status = 0; - struct voltage_policy_single_rail *ppolicy; - struct nv_pmu_volt_volt_policy_sr_boardobj_set *pset; - - status = volt_policy_pmu_data_init_super(g, pboardobj, ppmudata); - if (status) { - goto done; - } - - ppolicy = (struct voltage_policy_single_rail *)pboardobj; - pset = (struct nv_pmu_volt_volt_policy_sr_boardobj_set *) - ppmudata; - pset->rail_idx = ppolicy->rail_idx; - -done: - return status; -} - -static int volt_policy_pmu_data_init_sr_multi_step(struct gk20a *g, - struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) -{ - int status = 0; - struct voltage_policy_single_rail_multi_step *ppolicy; - struct nv_pmu_volt_volt_policy_sr_multi_step_boardobj_set *pset; - - status = volt_policy_pmu_data_init_single_rail(g, pboardobj, ppmudata); - if (status) { - goto done; - } - - ppolicy = (struct voltage_policy_single_rail_multi_step *)pboardobj; - pset = (struct nv_pmu_volt_volt_policy_sr_multi_step_boardobj_set *) - ppmudata; - - pset->ramp_up_step_size_uv = ppolicy->ramp_up_step_size_uv; - pset->ramp_down_step_size_uv = ppolicy->ramp_down_step_size_uv; - pset->inter_switch_delay_us = ppolicy->inter_switch_delay_us; - -done: - return status; -} - -static int volt_construct_volt_policy_single_rail_multi_step(struct gk20a *g, - struct boardobj **ppboardobj, u16 size, void *pargs) -{ - struct boardobj *pboardobj = NULL; - struct voltage_policy_single_rail_multi_step *p_volt_policy = NULL; - struct voltage_policy_single_rail_multi_step *tmp_policy = - (struct voltage_policy_single_rail_multi_step *)pargs; - int status = 0; - - status = construct_volt_policy_single_rail(g, ppboardobj, size, pargs); - if (status) { - return status; - } - - pboardobj = (*ppboardobj); - p_volt_policy = (struct voltage_policy_single_rail_multi_step *) - *ppboardobj; - - pboardobj->pmudatainit = volt_policy_pmu_data_init_sr_multi_step; - - p_volt_policy->ramp_up_step_size_uv = - tmp_policy->ramp_up_step_size_uv; - p_volt_policy->ramp_down_step_size_uv = - tmp_policy->ramp_down_step_size_uv; - p_volt_policy->inter_switch_delay_us = - tmp_policy->inter_switch_delay_us; - - return status; -} - -static int volt_policy_pmu_data_init_split_rail(struct gk20a *g, - struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) -{ - int status = 0; - struct voltage_policy_split_rail *ppolicy; - struct nv_pmu_volt_volt_policy_splt_r_boardobj_set *pset; - - status = volt_policy_pmu_data_init_super(g, pboardobj, ppmudata); - if (status) { - goto done; - } - - ppolicy = (struct voltage_policy_split_rail *)pboardobj; - pset = (struct nv_pmu_volt_volt_policy_splt_r_boardobj_set *) - ppmudata; - - pset->rail_idx_master = ppolicy->rail_idx_master; - pset->rail_idx_slave = ppolicy->rail_idx_slave; - pset->delta_min_vfe_equ_idx = ppolicy->delta_min_vfe_equ_idx; - pset->delta_max_vfe_equ_idx = ppolicy->delta_max_vfe_equ_idx; - pset->offset_delta_min_uv = ppolicy->offset_delta_min_uv; - pset->offset_delta_max_uv = ppolicy->offset_delta_max_uv; - -done: - return status; -} - -static int volt_construct_volt_policy_split_rail_single_step(struct gk20a *g, - struct boardobj **ppboardobj, u16 size, void *pargs) -{ - struct boardobj *pboardobj = NULL; - int status = 0; - - status = construct_volt_policy_split_rail(g, ppboardobj, size, pargs); - if (status) { - return status; - } - - pboardobj = (*ppboardobj); - pboardobj->pmudatainit = volt_policy_pmu_data_init_split_rail; - - return status; -} - -static struct voltage_policy *volt_volt_policy_construct(struct gk20a *g, void *pargs) -{ - struct boardobj *pboard_obj = NULL; - int status = 0; - - switch (BOARDOBJ_GET_TYPE(pargs)) { - case CTRL_VOLT_POLICY_TYPE_SR_SINGLE_STEP: - status = volt_construct_volt_policy_split_rail_single_step(g, - &pboard_obj, - sizeof(struct voltage_policy_split_rail_single_step), - pargs); - if (status) { - nvgpu_err(g, - "Could not allocate memory for voltage_policy"); - pboard_obj = NULL; - } - break; - case CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL_MULTI_STEP: - status = volt_construct_volt_policy_single_rail_multi_step(g, - &pboard_obj, - sizeof(struct voltage_policy_single_rail_multi_step), - pargs); - if (status) { - nvgpu_err(g, - "Could not allocate memory for voltage_policy"); - pboard_obj = NULL; - } - break; - } - - return (struct voltage_policy *)pboard_obj; -} - -static u8 volt_policy_type_convert(u8 vbios_type) -{ - switch (vbios_type) { - case NV_VBIOS_VOLTAGE_POLICY_1X_ENTRY_TYPE_SINGLE_RAIL: - return CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL; - - case NV_VBIOS_VOLTAGE_POLICY_1X_ENTRY_TYPE_SR_MULTI_STEP: - return CTRL_VOLT_POLICY_TYPE_SR_MULTI_STEP; - - case NV_VBIOS_VOLTAGE_POLICY_1X_ENTRY_TYPE_SR_SINGLE_STEP: - return CTRL_VOLT_POLICY_TYPE_SR_SINGLE_STEP; - case NV_VBIOS_VOLTAGE_POLICY_1X_ENTRY_TYPE_SINGLE_RAIL_MULTI_STEP: - return CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL_MULTI_STEP; - } - - return CTRL_VOLT_POLICY_TYPE_INVALID; -} - -static int volt_get_volt_policy_table(struct gk20a *g, - struct voltage_policy_metadata *pvolt_policy_metadata) -{ - int status = 0; - u8 *voltage_policy_table_ptr = NULL; - struct voltage_policy *ppolicy = NULL; - struct vbios_voltage_policy_table_1x_header header = { 0 }; - struct vbios_voltage_policy_table_1x_entry entry = { 0 }; - u8 i; - u8 policy_type = 0; - u8 *entry_offset; - union policy_type { - struct boardobj board_obj; - struct voltage_policy volt_policy; - struct voltage_policy_split_rail split_rail; - struct voltage_policy_single_rail_multi_step single_rail_ms; - } policy_type_data; - - voltage_policy_table_ptr = - (u8 *)nvgpu_bios_get_perf_table_ptrs(g, - g->bios.perf_token, VOLTAGE_POLICY_TABLE); - if (voltage_policy_table_ptr == NULL) { - status = -EINVAL; - goto done; - } - - memcpy(&header, voltage_policy_table_ptr, - sizeof(struct vbios_voltage_policy_table_1x_header)); - - /* Set Voltage Policy Table Index for Perf Core VF Sequence client. */ - pvolt_policy_metadata->perf_core_vf_seq_policy_idx = - (u8)header.perf_core_vf_seq_policy_idx; - - /* Read in the entries. */ - for (i = 0; i < header.num_table_entries; i++) { - entry_offset = (voltage_policy_table_ptr + header.header_size + - i * header.table_entry_size); - - memcpy(&entry, entry_offset, - sizeof(struct vbios_voltage_policy_table_1x_entry)); - - memset(&policy_type_data, 0x0, sizeof(policy_type_data)); - - policy_type = volt_policy_type_convert((u8)entry.type); - - switch (policy_type) { - case CTRL_VOLT_POLICY_TYPE_SR_SINGLE_STEP: - policy_type_data.split_rail.rail_idx_master = - (u8)BIOS_GET_FIELD(entry.param0, - NV_VBIOS_VPT_ENTRY_PARAM0_SR_VD_MASTER); - - policy_type_data.split_rail.rail_idx_slave = - (u8)BIOS_GET_FIELD(entry.param0, - NV_VBIOS_VPT_ENTRY_PARAM0_SR_VD_SLAVE); - - policy_type_data.split_rail.delta_min_vfe_equ_idx = - (u8)BIOS_GET_FIELD(entry.param0, - NV_VBIOS_VPT_ENTRY_PARAM0_SR_DELTA_SM_MIN); - - policy_type_data.split_rail.delta_max_vfe_equ_idx = - (u8)BIOS_GET_FIELD(entry.param0, - NV_VBIOS_VPT_ENTRY_PARAM0_SR_DELTA_SM_MAX); - break; - case CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL_MULTI_STEP: - policy_type_data.single_rail_ms.inter_switch_delay_us = - (u16)BIOS_GET_FIELD(entry.param1, - NV_VBIOS_VPT_ENTRY_PARAM1_SR_SETTLE_TIME_INTERMEDIATE); - policy_type_data.single_rail_ms.ramp_up_step_size_uv = - (u32)BIOS_GET_FIELD(entry.param2, - NV_VBIOS_VPT_ENTRY_PARAM2_SR_RAMP_UP_STEP_SIZE_UV); - policy_type_data.single_rail_ms.ramp_down_step_size_uv = - (u32)BIOS_GET_FIELD(entry.param3, - NV_VBIOS_VPT_ENTRY_PARAM3_SR_RAMP_DOWN_STEP_SIZE_UV); - break; - } - - policy_type_data.board_obj.type = policy_type; - - ppolicy = volt_volt_policy_construct(g, - (void *)&policy_type_data); - if (ppolicy == NULL) { - nvgpu_err(g, - "Failure to construct VOLT_POLICY object."); - status = -EINVAL; - goto done; - } - - status = boardobjgrp_objinsert( - &pvolt_policy_metadata->volt_policies.super, - (struct boardobj *)ppolicy, i); - if (status) { - nvgpu_err(g, - "could not add volt_policy for entry %d into boardobjgrp ", - i); - goto done; - } - } - -done: - return status; -} -static int _volt_policy_devgrp_pmudata_instget(struct gk20a *g, - struct nv_pmu_boardobjgrp *pmuboardobjgrp, - struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) -{ - struct nv_pmu_volt_volt_policy_boardobj_grp_set *pgrp_set = - (struct nv_pmu_volt_volt_policy_boardobj_grp_set *) - pmuboardobjgrp; - - nvgpu_log_info(g, " "); - - /*check whether pmuboardobjgrp has a valid boardobj in index*/ - if (((u32)BIT(idx) & - pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0U) { - return -EINVAL; - } - - *ppboardobjpmudata = (struct nv_pmu_boardobj *) - &pgrp_set->objects[idx].data.board_obj; - nvgpu_log_info(g, " Done"); - return 0; -} - -static int _volt_policy_devgrp_pmustatus_instget(struct gk20a *g, - void *pboardobjgrppmu, - struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) -{ - struct nv_pmu_volt_volt_policy_boardobj_grp_get_status *p_get_status = - (struct nv_pmu_volt_volt_policy_boardobj_grp_get_status *) - pboardobjgrppmu; - - /*check whether pmuboardobjgrp has a valid boardobj in index*/ - if (((u32)BIT(idx) & - p_get_status->hdr.data.super.obj_mask.super.data[0]) == 0U) { - return -EINVAL; - } - - *ppboardobjpmustatus = (struct nv_pmu_boardobj_query *) - &p_get_status->objects[idx].data.board_obj; - return 0; -} - -static int _volt_policy_grp_pmudatainit_super(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) -{ - struct nv_pmu_volt_volt_policy_boardobjgrp_set_header *pset = - (struct nv_pmu_volt_volt_policy_boardobjgrp_set_header *) - pboardobjgrppmu; - struct obj_volt *volt = (struct obj_volt *)pboardobjgrp; - int status = 0; - - status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); - if (status) { - nvgpu_err(g, - "error updating pmu boardobjgrp for volt policy 0x%x", - status); - goto done; - } - pset->perf_core_vf_seq_policy_idx = - volt->volt_policy_metadata.perf_core_vf_seq_policy_idx; - -done: - return status; -} - -int volt_policy_pmu_setup(struct gk20a *g) -{ - int status; - struct boardobjgrp *pboardobjgrp = NULL; - - nvgpu_log_info(g, " "); - - pboardobjgrp = - &g->perf_pmu.volt.volt_policy_metadata.volt_policies.super; - - if (!pboardobjgrp->bconstructed) { - return -EINVAL; - } - - status = pboardobjgrp->pmuinithandle(g, pboardobjgrp); - - nvgpu_log_info(g, "Done"); - return status; -} - -int volt_policy_sw_setup(struct gk20a *g) -{ - int status = 0; - struct boardobjgrp *pboardobjgrp = NULL; - - nvgpu_log_info(g, " "); - - status = boardobjgrpconstruct_e32(g, - &g->perf_pmu.volt.volt_policy_metadata.volt_policies); - if (status) { - nvgpu_err(g, - "error creating boardobjgrp for volt rail, status - 0x%x", - status); - goto done; - } - - pboardobjgrp = - &g->perf_pmu.volt.volt_policy_metadata.volt_policies.super; - - pboardobjgrp->pmudatainstget = _volt_policy_devgrp_pmudata_instget; - pboardobjgrp->pmustatusinstget = _volt_policy_devgrp_pmustatus_instget; - pboardobjgrp->pmudatainit = _volt_policy_grp_pmudatainit_super; - - /* Obtain Voltage Rail Table from VBIOS */ - status = volt_get_volt_policy_table(g, &g->perf_pmu.volt. - volt_policy_metadata); - if (status) { - goto done; - } - - /* Populate data for the VOLT_RAIL PMU interface */ - BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, VOLT, VOLT_POLICY); - - status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, - volt, VOLT, volt_policy, VOLT_POLICY); - if (status) { - nvgpu_err(g, - "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", - status); - goto done; - } - - status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g, - &g->perf_pmu.volt.volt_policy_metadata.volt_policies.super, - volt, VOLT, volt_policy, VOLT_POLICY); - if (status) { - nvgpu_err(g, - "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", - status); - goto done; - } - -done: - nvgpu_log_info(g, " done status %x", status); - return status; -} diff --git a/include/volt/volt_policy.h b/include/volt/volt_policy.h deleted file mode 100644 index 06f5aa3..0000000 --- a/include/volt/volt_policy.h +++ /dev/null @@ -1,80 +0,0 @@ -/* -* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. -* - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. -*/ - -#ifndef NVGPU_VOLT_POLICY_H -#define NVGPU_VOLT_POLICY_H - -#define VOLT_POLICY_INDEX_IS_VALID(pvolt, policy_idx) \ - (boardobjgrp_idxisvalid( \ - &((pvolt)->volt_policy_metadata.volt_policies.super), \ - (policy_idx))) - -/*! - * extends boardobj providing attributes common to all voltage_policies. - */ -struct voltage_policy { - struct boardobj super; -}; - -struct voltage_policy_metadata { - u8 perf_core_vf_seq_policy_idx; - struct boardobjgrp_e32 volt_policies; -}; - -/*! - * extends voltage_policy providing attributes - * common to all voltage_policy_split_rail. - */ -struct voltage_policy_split_rail { - struct voltage_policy super; - u8 rail_idx_master; - u8 rail_idx_slave; - u8 delta_min_vfe_equ_idx; - u8 delta_max_vfe_equ_idx; - s32 offset_delta_min_uv; - s32 offset_delta_max_uv; -}; - -struct voltage_policy_split_rail_single_step { - struct voltage_policy_split_rail super; -}; - -struct voltage_policy_split_rail_multi_step { - struct voltage_policy_split_rail super; - u16 inter_switch_delay_us; -}; - -struct voltage_policy_single_rail { - struct voltage_policy super; - u8 rail_idx; -}; - -struct voltage_policy_single_rail_multi_step { - struct voltage_policy_single_rail super; - u16 inter_switch_delay_us; - u32 ramp_up_step_size_uv; - u32 ramp_down_step_size_uv; -}; - -int volt_policy_sw_setup(struct gk20a *g); -int volt_policy_pmu_setup(struct gk20a *g); -#endif /* NVGPU_VOLT_POLICY_H */ diff --git a/include/volt/volt_rail.c b/include/volt/volt_rail.c deleted file mode 100644 index caf297f..0000000 --- a/include/volt/volt_rail.c +++ /dev/null @@ -1,485 +0,0 @@ -/* - * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include -#include - -#include "boardobj/boardobjgrp.h" -#include "boardobj/boardobjgrp_e32.h" -#include "gp106/bios_gp106.h" -#include "ctrl/ctrlvolt.h" - -#include "volt.h" - -u8 volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain) -{ - switch (g->perf_pmu.volt.volt_rail_metadata.volt_domain_hal) { - case CTRL_VOLT_DOMAIN_HAL_GP10X_SINGLE_RAIL: - switch (volt_domain) { - case CTRL_VOLT_DOMAIN_LOGIC: - return 0; - } - break; - case CTRL_VOLT_DOMAIN_HAL_GP10X_SPLIT_RAIL: - switch (volt_domain) { - case CTRL_VOLT_DOMAIN_LOGIC: - return 0; - case CTRL_VOLT_DOMAIN_SRAM: - return 1; - } - break; - } - - return CTRL_BOARDOBJ_IDX_INVALID; -} - -u32 volt_rail_volt_dev_register(struct gk20a *g, struct voltage_rail - *pvolt_rail, u8 volt_dev_idx, u8 operation_type) -{ - u32 status = 0; - - if (operation_type == CTRL_VOLT_DEVICE_OPERATION_TYPE_DEFAULT) { - if (pvolt_rail->volt_dev_idx_default == - CTRL_BOARDOBJ_IDX_INVALID) { - pvolt_rail->volt_dev_idx_default = volt_dev_idx; - } else { - status = -EINVAL; - goto exit; - } - } else if (operation_type == - CTRL_VOLT_VOLT_DEVICE_OPERATION_TYPE_IPC_VMIN) { - if (pvolt_rail->volt_dev_idx_ipc_vmin == - CTRL_BOARDOBJ_IDX_INVALID) { - pvolt_rail->volt_dev_idx_ipc_vmin = volt_dev_idx; - /* - * Exit on purpose as we do not want to register - * IPC_VMIN device against the rail to avoid - * setting current voltage instead of - * IPC Vmin voltage. - */ - goto exit; - } else { - status = -EINVAL; - goto exit; - } - } else { - goto exit; - } - - status = boardobjgrpmask_bitset(&pvolt_rail->volt_dev_mask.super, - volt_dev_idx); - -exit: - if (status) { - nvgpu_err(g, "Failed to register VOLTAGE_DEVICE"); - } - - return status; -} - -static u32 volt_rail_state_init(struct gk20a *g, - struct voltage_rail *pvolt_rail) -{ - u32 status = 0; - u32 i; - - pvolt_rail->volt_dev_idx_default = CTRL_BOARDOBJ_IDX_INVALID; - - for (i = 0; i < CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES; i++) { - pvolt_rail->volt_delta_uv[i] = (int)NV_PMU_VOLT_VALUE_0V_IN_UV; - g->perf_pmu.volt.volt_rail_metadata.ext_rel_delta_uv[i] = - NV_PMU_VOLT_VALUE_0V_IN_UV; - } - - pvolt_rail->volt_margin_limit_vfe_equ_mon_handle = - NV_PMU_PERF_RPC_VFE_EQU_MONITOR_COUNT_MAX; - pvolt_rail->rel_limit_vfe_equ_mon_handle = - NV_PMU_PERF_RPC_VFE_EQU_MONITOR_COUNT_MAX; - pvolt_rail->alt_rel_limit_vfe_equ_mon_handle = - NV_PMU_PERF_RPC_VFE_EQU_MONITOR_COUNT_MAX; - pvolt_rail->ov_limit_vfe_equ_mon_handle = - NV_PMU_PERF_RPC_VFE_EQU_MONITOR_COUNT_MAX; - - status = boardobjgrpmask_e32_init(&pvolt_rail->volt_dev_mask, NULL); - if (status) { - nvgpu_err(g, - "Failed to initialize BOARDOBJGRPMASK of VOLTAGE_DEVICEs"); - } - - return status; -} - -static int volt_rail_init_pmudata_super(struct gk20a *g, - struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) -{ - int status = 0; - struct voltage_rail *prail; - struct nv_pmu_volt_volt_rail_boardobj_set *rail_pmu_data; - u32 i; - - nvgpu_log_info(g, " "); - - status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); - if (status) { - return status; - } - - prail = (struct voltage_rail *)board_obj_ptr; - rail_pmu_data = (struct nv_pmu_volt_volt_rail_boardobj_set *) - ppmudata; - - rail_pmu_data->rel_limit_vfe_equ_idx = prail->rel_limit_vfe_equ_idx; - rail_pmu_data->alt_rel_limit_vfe_equ_idx = - prail->alt_rel_limit_vfe_equ_idx; - rail_pmu_data->ov_limit_vfe_equ_idx = prail->ov_limit_vfe_equ_idx; - rail_pmu_data->vmin_limit_vfe_equ_idx = prail->vmin_limit_vfe_equ_idx; - rail_pmu_data->volt_margin_limit_vfe_equ_idx = - prail->volt_margin_limit_vfe_equ_idx; - rail_pmu_data->pwr_equ_idx = prail->pwr_equ_idx; - rail_pmu_data->volt_dev_idx_default = prail->volt_dev_idx_default; - rail_pmu_data->volt_scale_exp_pwr_equ_idx = - prail->volt_scale_exp_pwr_equ_idx; - rail_pmu_data->volt_dev_idx_ipc_vmin = prail->volt_dev_idx_ipc_vmin; - - for (i = 0; i < CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES; i++) { - rail_pmu_data->volt_delta_uv[i] = prail->volt_delta_uv[i] + - (int)g->perf_pmu.volt.volt_rail_metadata.ext_rel_delta_uv[i]; - } - - status = boardobjgrpmask_export(&prail->volt_dev_mask.super, - prail->volt_dev_mask.super.bitcount, - &rail_pmu_data->volt_dev_mask.super); - if (status) { - nvgpu_err(g, - "Failed to export BOARDOBJGRPMASK of VOLTAGE_DEVICEs"); - } - - nvgpu_log_info(g, "Done"); - - return status; -} - -static struct voltage_rail *construct_volt_rail(struct gk20a *g, void *pargs) -{ - struct boardobj *board_obj_ptr = NULL; - struct voltage_rail *ptemp_rail = (struct voltage_rail *)pargs; - struct voltage_rail *board_obj_volt_rail_ptr = NULL; - int status; - - nvgpu_log_info(g, " "); - status = boardobj_construct_super(g, &board_obj_ptr, - sizeof(struct voltage_rail), pargs); - if (status) { - return NULL; - } - - board_obj_volt_rail_ptr = (struct voltage_rail *)board_obj_ptr; - /* override super class interface */ - board_obj_ptr->pmudatainit = volt_rail_init_pmudata_super; - - board_obj_volt_rail_ptr->boot_voltage_uv = - ptemp_rail->boot_voltage_uv; - board_obj_volt_rail_ptr->rel_limit_vfe_equ_idx = - ptemp_rail->rel_limit_vfe_equ_idx; - board_obj_volt_rail_ptr->alt_rel_limit_vfe_equ_idx = - ptemp_rail->alt_rel_limit_vfe_equ_idx; - board_obj_volt_rail_ptr->ov_limit_vfe_equ_idx = - ptemp_rail->ov_limit_vfe_equ_idx; - board_obj_volt_rail_ptr->pwr_equ_idx = - ptemp_rail->pwr_equ_idx; - board_obj_volt_rail_ptr->boot_volt_vfe_equ_idx = - ptemp_rail->boot_volt_vfe_equ_idx; - board_obj_volt_rail_ptr->vmin_limit_vfe_equ_idx = - ptemp_rail->vmin_limit_vfe_equ_idx; - board_obj_volt_rail_ptr->volt_margin_limit_vfe_equ_idx = - ptemp_rail->volt_margin_limit_vfe_equ_idx; - board_obj_volt_rail_ptr->volt_scale_exp_pwr_equ_idx = - ptemp_rail->volt_scale_exp_pwr_equ_idx; - - nvgpu_log_info(g, "Done"); - - return (struct voltage_rail *)board_obj_ptr; -} - -u8 volt_rail_vbios_volt_domain_convert_to_internal(struct gk20a *g, - u8 vbios_volt_domain) -{ - switch (g->perf_pmu.volt.volt_rail_metadata.volt_domain_hal) { - case CTRL_VOLT_DOMAIN_HAL_GP10X_SINGLE_RAIL: - if (vbios_volt_domain == 0U) { - return CTRL_VOLT_DOMAIN_LOGIC; - } - break; - case CTRL_VOLT_DOMAIN_HAL_GP10X_SPLIT_RAIL: - switch (vbios_volt_domain) { - case 0: - return CTRL_VOLT_DOMAIN_LOGIC; - case 1: - return CTRL_VOLT_DOMAIN_SRAM; - } - break; - } - - return CTRL_VOLT_DOMAIN_INVALID; -} - -int volt_rail_pmu_setup(struct gk20a *g) -{ - int status; - struct boardobjgrp *pboardobjgrp = NULL; - - nvgpu_log_info(g, " "); - - pboardobjgrp = &g->perf_pmu.volt.volt_rail_metadata.volt_rails.super; - - if (!pboardobjgrp->bconstructed) { - return -EINVAL; - } - - status = pboardobjgrp->pmuinithandle(g, pboardobjgrp); - - nvgpu_log_info(g, "Done"); - return status; -} - -static int volt_get_volt_rail_table(struct gk20a *g, - struct voltage_rail_metadata *pvolt_rail_metadata) -{ - int status = 0; - u8 *volt_rail_table_ptr = NULL; - struct voltage_rail *prail = NULL; - struct vbios_voltage_rail_table_1x_header header = { 0 }; - struct vbios_voltage_rail_table_1x_entry entry = { 0 }; - u8 i; - u8 volt_domain; - u8 *entry_ptr; - union rail_type { - struct boardobj board_obj; - struct voltage_rail volt_rail; - } rail_type_data; - - volt_rail_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g, - g->bios.perf_token, VOLTAGE_RAIL_TABLE); - if (volt_rail_table_ptr == NULL) { - status = -EINVAL; - goto done; - } - - memcpy(&header, volt_rail_table_ptr, - sizeof(struct vbios_voltage_rail_table_1x_header)); - - pvolt_rail_metadata->volt_domain_hal = (u8)header.volt_domain_hal; - - for (i = 0; i < header.num_table_entries; i++) { - entry_ptr = (volt_rail_table_ptr + header.header_size + - (i * header.table_entry_size)); - - memset(&rail_type_data, 0x0, sizeof(rail_type_data)); - - memcpy(&entry, entry_ptr, - sizeof(struct vbios_voltage_rail_table_1x_entry)); - - volt_domain = volt_rail_vbios_volt_domain_convert_to_internal(g, - i); - if (volt_domain == CTRL_VOLT_DOMAIN_INVALID) { - continue; - } - - rail_type_data.board_obj.type = volt_domain; - rail_type_data.volt_rail.boot_voltage_uv = - (u32)entry.boot_voltage_uv; - rail_type_data.volt_rail.rel_limit_vfe_equ_idx = - (u8)entry.rel_limit_vfe_equ_idx; - rail_type_data.volt_rail.alt_rel_limit_vfe_equ_idx = - (u8)entry.alt_rel_limit_vfe_equidx; - rail_type_data.volt_rail.ov_limit_vfe_equ_idx = - (u8)entry.ov_limit_vfe_equ_idx; - - if (header.table_entry_size >= - NV_VBIOS_VOLTAGE_RAIL_1X_ENTRY_SIZE_0C) { - rail_type_data.volt_rail.volt_scale_exp_pwr_equ_idx = - (u8)entry.volt_scale_exp_pwr_equ_idx; - } else { - rail_type_data.volt_rail.volt_scale_exp_pwr_equ_idx = - CTRL_BOARDOBJ_IDX_INVALID; - } - - if (header.table_entry_size >= - NV_VBIOS_VOLTAGE_RAIL_1X_ENTRY_SIZE_0B) { - rail_type_data.volt_rail.volt_margin_limit_vfe_equ_idx = - (u8)entry.volt_margin_limit_vfe_equ_idx; - } else { - rail_type_data.volt_rail.volt_margin_limit_vfe_equ_idx = - CTRL_BOARDOBJ_IDX_INVALID; - } - - if (header.table_entry_size >= - NV_VBIOS_VOLTAGE_RAIL_1X_ENTRY_SIZE_0A) { - rail_type_data.volt_rail.vmin_limit_vfe_equ_idx = - (u8)entry.vmin_limit_vfe_equ_idx; - } else { - rail_type_data.volt_rail.vmin_limit_vfe_equ_idx = - CTRL_BOARDOBJ_IDX_INVALID; - } - - if (header.table_entry_size >= - NV_VBIOS_VOLTAGE_RAIL_1X_ENTRY_SIZE_09) { - rail_type_data.volt_rail.boot_volt_vfe_equ_idx = - (u8)entry.boot_volt_vfe_equ_idx; - } else { - rail_type_data.volt_rail.boot_volt_vfe_equ_idx = - CTRL_BOARDOBJ_IDX_INVALID; - } - - if (header.table_entry_size >= - NV_VBIOS_VOLTAGE_RAIL_1X_ENTRY_SIZE_08) { - rail_type_data.volt_rail.pwr_equ_idx = - (u8)entry.pwr_equ_idx; - } else { - rail_type_data.volt_rail.pwr_equ_idx = - CTRL_PMGR_PWR_EQUATION_INDEX_INVALID; - } - - prail = construct_volt_rail(g, &rail_type_data); - - status = boardobjgrp_objinsert( - &pvolt_rail_metadata->volt_rails.super, - (struct boardobj *)prail, i); - } - -done: - return status; -} - -static int _volt_rail_devgrp_pmudata_instget(struct gk20a *g, - struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj - **ppboardobjpmudata, u8 idx) -{ - struct nv_pmu_volt_volt_rail_boardobj_grp_set *pgrp_set = - (struct nv_pmu_volt_volt_rail_boardobj_grp_set *) - pmuboardobjgrp; - - nvgpu_log_info(g, " "); - - /*check whether pmuboardobjgrp has a valid boardobj in index*/ - if (((u32)BIT(idx) & - pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0U) { - return -EINVAL; - } - - *ppboardobjpmudata = (struct nv_pmu_boardobj *) - &pgrp_set->objects[idx].data.board_obj; - nvgpu_log_info(g, " Done"); - return 0; -} - -static int _volt_rail_devgrp_pmustatus_instget(struct gk20a *g, - void *pboardobjgrppmu, struct nv_pmu_boardobj_query - **ppboardobjpmustatus, u8 idx) -{ - struct nv_pmu_volt_volt_rail_boardobj_grp_get_status *pgrp_get_status = - (struct nv_pmu_volt_volt_rail_boardobj_grp_get_status *) - pboardobjgrppmu; - - /*check whether pmuboardobjgrp has a valid boardobj in index*/ - if (((u32)BIT(idx) & - pgrp_get_status->hdr.data.super.obj_mask.super.data[0]) == 0U) { - return -EINVAL; - } - - *ppboardobjpmustatus = (struct nv_pmu_boardobj_query *) - &pgrp_get_status->objects[idx].data.board_obj; - return 0; -} - -int volt_rail_sw_setup(struct gk20a *g) -{ - int status = 0; - struct boardobjgrp *pboardobjgrp = NULL; - struct voltage_rail *pvolt_rail; - u8 i; - - nvgpu_log_info(g, " "); - - status = boardobjgrpconstruct_e32(g, - &g->perf_pmu.volt.volt_rail_metadata.volt_rails); - if (status) { - nvgpu_err(g, - "error creating boardobjgrp for volt rail, status - 0x%x", - status); - goto done; - } - - pboardobjgrp = &g->perf_pmu.volt.volt_rail_metadata.volt_rails.super; - - pboardobjgrp->pmudatainstget = _volt_rail_devgrp_pmudata_instget; - pboardobjgrp->pmustatusinstget = _volt_rail_devgrp_pmustatus_instget; - - g->perf_pmu.volt.volt_rail_metadata.pct_delta = - NV_PMU_VOLT_VALUE_0V_IN_UV; - - /* Obtain Voltage Rail Table from VBIOS */ - status = volt_get_volt_rail_table(g, &g->perf_pmu.volt. - volt_rail_metadata); - if (status) { - goto done; - } - - /* Populate data for the VOLT_RAIL PMU interface */ - BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, VOLT, VOLT_RAIL); - - status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, - volt, VOLT, volt_rail, VOLT_RAIL); - if (status) { - nvgpu_err(g, - "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", - status); - goto done; - } - - status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g, - &g->perf_pmu.volt.volt_rail_metadata.volt_rails.super, - volt, VOLT, volt_rail, VOLT_RAIL); - if (status) { - nvgpu_err(g, - "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", - status); - goto done; - } - - /* update calibration to fuse */ - BOARDOBJGRP_FOR_EACH(&(g->perf_pmu.volt.volt_rail_metadata. - volt_rails.super), - struct voltage_rail *, pvolt_rail, i) { - status = volt_rail_state_init(g, pvolt_rail); - if (status) { - nvgpu_err(g, - "Failure while executing RAIL's state init railIdx = %d", - i); - goto done; - } - } - -done: - nvgpu_log_info(g, " done status %x", status); - return status; -} diff --git a/include/volt/volt_rail.h b/include/volt/volt_rail.h deleted file mode 100644 index 72bb254..0000000 --- a/include/volt/volt_rail.h +++ /dev/null @@ -1,90 +0,0 @@ -/* -* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. -* - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. -*/ - - -#ifndef NVGPU_VOLT_RAIL_H -#define NVGPU_VOLT_RAIL_H - -#include "boardobj/boardobj.h" -#include "boardobj/boardobjgrp.h" - -#define CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES 0x04U -#define CTRL_PMGR_PWR_EQUATION_INDEX_INVALID 0xFFU - -#define VOLT_GET_VOLT_RAIL(pvolt, rail_idx) \ - ((struct voltage_rail *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ - &((pvolt)->volt_rail_metadata.volt_rails.super), (rail_idx))) - -#define VOLT_RAIL_INDEX_IS_VALID(pvolt, rail_idx) \ - (boardobjgrp_idxisvalid( \ - &((pvolt)->volt_rail_metadata.volt_rails.super), (rail_idx))) - -#define VOLT_RAIL_VOLT_3X_SUPPORTED(pvolt) \ - (!BOARDOBJGRP_IS_EMPTY(&((pvolt)->volt_rail_metadata.volt_rails.super))) - -/*! - * extends boardobj providing attributes common to all voltage_rails. - */ -struct voltage_rail { - struct boardobj super; - u32 boot_voltage_uv; - u8 rel_limit_vfe_equ_idx; - u8 alt_rel_limit_vfe_equ_idx; - u8 ov_limit_vfe_equ_idx; - u8 pwr_equ_idx; - u8 volt_scale_exp_pwr_equ_idx; - u8 volt_dev_idx_default; - u8 volt_dev_idx_ipc_vmin; - u8 boot_volt_vfe_equ_idx; - u8 vmin_limit_vfe_equ_idx; - u8 volt_margin_limit_vfe_equ_idx; - u32 volt_margin_limit_vfe_equ_mon_handle; - u32 rel_limit_vfe_equ_mon_handle; - u32 alt_rel_limit_vfe_equ_mon_handle; - u32 ov_limit_vfe_equ_mon_handle; - struct boardobjgrpmask_e32 volt_dev_mask; - s32 volt_delta_uv[CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES]; -}; - -/*! - * metadata of voltage rail functionality. - */ -struct voltage_rail_metadata { - u8 volt_domain_hal; - u8 pct_delta; - u32 ext_rel_delta_uv[CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES]; - u8 logic_rail_idx; - u8 sram_rail_idx; - struct boardobjgrp_e32 volt_rails; -}; - -u8 volt_rail_vbios_volt_domain_convert_to_internal - (struct gk20a *g, u8 vbios_volt_domain); - -u32 volt_rail_volt_dev_register(struct gk20a *g, struct voltage_rail - *pvolt_rail, u8 volt_dev_idx, u8 operation_type); - -u8 volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain); - -int volt_rail_sw_setup(struct gk20a *g); -int volt_rail_pmu_setup(struct gk20a *g); -#endif /* NVGPU_VOLT_RAIL_H */ -- cgit v1.2.2