From 2c5337a24f7f2d02989dfb733c55d6d8c7e90493 Mon Sep 17 00:00:00 2001 From: Joshua Bakita Date: Sun, 29 Oct 2023 13:07:40 -0400 Subject: Update includes to L4T r32.7.4 and drop nvgpu/gk20a.h dependency Also add instructions for updating `include/`. These files are now only needed to build on Linux 4.9-based Tegra platforms. --- include/os/linux/driver_common.c | 69 ++++++++++++++++++++++++++++++++++------ 1 file changed, 59 insertions(+), 10 deletions(-) (limited to 'include/os/linux/driver_common.c') diff --git a/include/os/linux/driver_common.c b/include/os/linux/driver_common.c index c76dabe..8f5872d 100644 --- a/include/os/linux/driver_common.c +++ b/include/os/linux/driver_common.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -241,6 +242,8 @@ int nvgpu_probe(struct gk20a *g, struct device *dev = dev_from_gk20a(g); struct gk20a_platform *platform = dev_get_drvdata(dev); int err = 0; + struct device_node *np = dev->of_node; + bool disable_l3_alloc = false; nvgpu_init_vars(g); nvgpu_init_gr_vars(g); @@ -265,6 +268,12 @@ int nvgpu_probe(struct gk20a *g, return err; } + disable_l3_alloc = of_property_read_bool(np, "disable_l3_alloc"); + if (disable_l3_alloc) { + nvgpu_log_info(g, "L3 alloc is disabled\n"); + __nvgpu_set_enabled(g, NVGPU_DISABLE_L3_SUPPORT, true); + } + nvgpu_init_mm_vars(g); /* platform probe can defer do user init only if probe succeeds */ @@ -312,30 +321,70 @@ static int cyclic_delta(int a, int b) } /** - * nvgpu_wait_for_deferred_interrupts - Wait for interrupts to complete + * nvgpu_wait_for_stall_interrupts - Wait for the stalling interrupts to + * complete. * * @g - The GPU to wait on. + * @timeout - maximum time period to wait for. * - * Waits until all interrupt handlers that have been scheduled to run have - * completed. + * Waits until all stalling interrupt handlers that have been scheduled to run + * have completed. */ -void nvgpu_wait_for_deferred_interrupts(struct gk20a *g) +int nvgpu_wait_for_stall_interrupts(struct gk20a *g, u32 timeout) { struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); int stall_irq_threshold = atomic_read(&l->hw_irq_stall_count); - int nonstall_irq_threshold = atomic_read(&l->hw_irq_nonstall_count); /* wait until all stalling irqs are handled */ - NVGPU_COND_WAIT(&l->sw_irq_stall_last_handled_wq, + return NVGPU_COND_WAIT(&l->sw_irq_stall_last_handled_wq, cyclic_delta(stall_irq_threshold, atomic_read(&l->sw_irq_stall_last_handled)) - <= 0, 0); + <= 0, timeout); +} + +/** + * nvgpu_wait_for_nonstall_interrupts - Wait for the nonstalling interrupts to + * complete. + * + * @g - The GPU to wait on. + * @timeout - maximum time period to wait for. + * + * Waits until all non-stalling interrupt handlers that have been scheduled to + * run have completed. + */ +int nvgpu_wait_for_nonstall_interrupts(struct gk20a *g, u32 timeout) +{ + struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); + int nonstall_irq_threshold = atomic_read(&l->hw_irq_nonstall_count); /* wait until all non-stalling irqs are handled */ - NVGPU_COND_WAIT(&l->sw_irq_nonstall_last_handled_wq, + return NVGPU_COND_WAIT(&l->sw_irq_nonstall_last_handled_wq, cyclic_delta(nonstall_irq_threshold, atomic_read(&l->sw_irq_nonstall_last_handled)) - <= 0, 0); + <= 0, timeout); +} + +/** + * nvgpu_wait_for_deferred_interrupts - Wait for interrupts to complete + * + * @g - The GPU to wait on. + * + * Waits until all interrupt handlers that have been scheduled to run have + * completed. + */ +void nvgpu_wait_for_deferred_interrupts(struct gk20a *g) +{ + int ret; + + ret = nvgpu_wait_for_stall_interrupts(g, 0U); + if (ret != 0) { + nvgpu_err(g, "wait for stall interrupts failed %d", ret); + } + + ret = nvgpu_wait_for_nonstall_interrupts(g, 0U); + if (ret != 0) { + nvgpu_err(g, "wait for nonstall interrupts failed %d", ret); + } } static void nvgpu_free_gk20a(struct gk20a *g) -- cgit v1.2.2