From f347fde22f1297e4f022600d201780d5ead78114 Mon Sep 17 00:00:00 2001 From: Joshua Bakita Date: Wed, 25 Sep 2024 16:09:09 -0400 Subject: Delete no-longer-needed nvgpu headers The dependency on these was removed in commit 8340d234. --- include/nvgpu/sec2if/sec2_cmd_if.h | 50 ------------------- include/nvgpu/sec2if/sec2_if_acr.h | 96 ------------------------------------- include/nvgpu/sec2if/sec2_if_cmn.h | 73 ---------------------------- include/nvgpu/sec2if/sec2_if_sec2.h | 75 ----------------------------- 4 files changed, 294 deletions(-) delete mode 100644 include/nvgpu/sec2if/sec2_cmd_if.h delete mode 100644 include/nvgpu/sec2if/sec2_if_acr.h delete mode 100644 include/nvgpu/sec2if/sec2_if_cmn.h delete mode 100644 include/nvgpu/sec2if/sec2_if_sec2.h (limited to 'include/nvgpu/sec2if') diff --git a/include/nvgpu/sec2if/sec2_cmd_if.h b/include/nvgpu/sec2if/sec2_cmd_if.h deleted file mode 100644 index 839743f..0000000 --- a/include/nvgpu/sec2if/sec2_cmd_if.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#ifndef NVGPU_SEC2_CMD_IF_H -#define NVGPU_SEC2_CMD_IF_H - -#include -#include - -struct nv_flcn_cmd_sec2 { - struct pmu_hdr hdr; - union { - union nv_sec2_acr_cmd acr; - } cmd; -}; - -struct nv_flcn_msg_sec2 { - struct pmu_hdr hdr; - - union { - union nv_flcn_msg_sec2_init init; - union nv_sec2_acr_msg acr; - } msg; -}; - -#define NV_SEC2_UNIT_REWIND NV_FLCN_UNIT_ID_REWIND -#define NV_SEC2_UNIT_INIT (0x01U) -#define NV_SEC2_UNIT_ACR (0x07U) -#define NV_SEC2_UNIT_END (0x0AU) - -#endif /* NVGPU_SEC2_CMD_IF_H */ diff --git a/include/nvgpu/sec2if/sec2_if_acr.h b/include/nvgpu/sec2if/sec2_if_acr.h deleted file mode 100644 index 5b41958..0000000 --- a/include/nvgpu/sec2if/sec2_if_acr.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#ifndef NVGPU_SEC2_IF_ACR_H -#define NVGPU_SEC2_IF_ACR_H - -#include - -/* - * ACR Command Types - * _BOOT_FALCON - * NVGPU sends a Falcon ID and LSB offset to SEC2 to boot - * the falcon in LS mode. - * SEC2 needs to hanlde the case since UCODE of falcons are - * stored in secured location on FB. - */ -#define NV_SEC2_ACR_CMD_ID_BOOTSTRAP_FALCON 0U - -/* nvgpu provides the Falcon ID to bootstrap */ -struct nv_sec2_acr_cmd_bootstrap_falcon { - /* Command must be first as this struct is the part of union */ - u8 cmd_type; - - /* Additional bootstrapping flags */ - u32 flags; - - /* ID to identify Falcon, ref LSF_FALCON_ID_ */ - u32 falcon_id; -}; - -#define NV_SEC2_ACR_CMD_BOOTSTRAP_FALCON_FLAGS_RESET 0U -#define NV_SEC2_ACR_CMD_BOOTSTRAP_FALCON_FLAGS_RESET_NO 1U -#define NV_SEC2_ACR_CMD_BOOTSTRAP_FALCON_FLAGS_RESET_YES 0U - -/* A union of all ACR Commands */ -union nv_sec2_acr_cmd { - /* Command type */ - u8 cmd_type; - - /* Bootstrap Falcon */ - struct nv_sec2_acr_cmd_bootstrap_falcon bootstrap_falcon; -}; - -/* ACR Message Status */ - -/* Returns the Bootstrapped falcon ID to RM */ -#define NV_SEC2_ACR_MSG_ID_BOOTSTRAP_FALCON 0U - -/* Returns the Error Status for Invalid Command */ -#define NV_SEC2_ACR_MSG_ID_INVALID_COMMAND 2U - -/* - * SEC2 notifies nvgpu about bootstrap status of falcon - */ -struct nv_sec2_acr_msg_bootstrap_falcon { - /* Message must be at start */ - u8 msg_type; - - /* Falcon Error Code returned by message */ - u32 error_code; - - /* Bootstrapped falcon ID by ACR */ - u32 falcon_id; -} ; - -/* - * A union of all ACR Messages. - */ -union nv_sec2_acr_msg { - /* Message type */ - u8 msg_type; - - /* Bootstrap details of falcon and status code */ - struct nv_sec2_acr_msg_bootstrap_falcon msg_flcn; -}; - -#endif /* NVGPU_SEC2_IF_ACR_H */ diff --git a/include/nvgpu/sec2if/sec2_if_cmn.h b/include/nvgpu/sec2if/sec2_if_cmn.h deleted file mode 100644 index a40f8f9..0000000 --- a/include/nvgpu/sec2if/sec2_if_cmn.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#ifndef NVGPU_SEC2_IF_CMN_H -#define NVGPU_SEC2_IF_CMN_H - -/* - * Define the maximum number of command sequences that can be in flight at - * any given time. This is dictated by the width of the sequence number - * id ('seqNumId') stored in each sequence packet (currently 8-bits). - */ -#define NV_SEC2_MAX_NUM_SEQUENCES 256U - -/* - * Compares an unit id against the values in the unit_id enumeration and - * verifies that the id is valid. It is expected that the id is specified - * as an unsigned integer. - */ -#define NV_SEC2_UNITID_IS_VALID(id) (((id) < NV_SEC2_UNIT_END)) - -/* - * Defines the size of the surface/buffer that will be allocated to store - * debug spew from the SEC2 ucode application when falcon-trace is enabled. - */ -#define NV_SEC2_DEBUG_SURFACE_SIZE (32U*1024U) - -/* - * SEC2's frame-buffer interface block has several slots/indices which can - * be bound to support DMA to various surfaces in memory. This is an - * enumeration that gives name to each index based on type of memory-aperture - * the index is used to access. - * - * Pre-Turing, NV_SEC2_DMAIDX_PHYS_VID_FN0 == NV_SEC2_DMAIDX_GUEST_PHYS_VID_BOUND. - * From Turing, engine context is stored in GPA, requiring a separate aperture. - * - * Traditionally, video falcons have used the 6th index for ucode, and we will - * continue to use that to allow legacy ucode to work seamlessly. - * - * Note: DO NOT CHANGE THE VALUE OF NV_SEC2_DMAIDX_UCODE. That value is used by - * both the legacy SEC2 ucode, which assumes that it will use index 6, and by - * SEC2 RTOS. Changing it will break legacy SEC2 ucode, unless it is updated to - * reflect the new value. - */ - -#define NV_SEC2_DMAIDX_GUEST_PHYS_VID_BOUND 0U -#define NV_SEC2_DMAIDX_VIRT 1U -#define NV_SEC2_DMAIDX_PHYS_VID_FN0 2U -#define NV_SEC2_DMAIDX_PHYS_SYS_COH_FN0 3U -#define NV_SEC2_DMAIDX_PHYS_SYS_NCOH_FN0 4U -#define NV_SEC2_DMAIDX_GUEST_PHYS_SYS_COH_BOUND 5U -#define NV_SEC2_DMAIDX_UCODE 6U -#define NV_SEC2_DMAIDX_GUEST_PHYS_SYS_NCOH_BOUND 7U - -#endif /* NVGPU_SEC2_IF_CMN_H */ diff --git a/include/nvgpu/sec2if/sec2_if_sec2.h b/include/nvgpu/sec2if/sec2_if_sec2.h deleted file mode 100644 index c895c41..0000000 --- a/include/nvgpu/sec2if/sec2_if_sec2.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#ifndef NVGPU_SEC2_IF_SEC2_H -#define NVGPU_SEC2_IF_SEC2_H - -/* - * SEC2 Command/Message Interfaces - SEC2 Management - */ - -/* - * Defines the identifiers various high-level types of sequencer commands and - * messages. - * _SEC2_INIT - sec2_init_msg_sec2_init - */ -enum -{ - NV_SEC2_INIT_MSG_ID_SEC2_INIT = 0U, -}; - -/* - * Defines the logical queue IDs that must be used when submitting commands - * to or reading messages from SEC2. The identifiers must begin with zero and - * should increment sequentially. _CMDQ_LOG_ID__LAST must always be set to the - * last command queue identifier. _NUM must always be set to the last - * identifier plus one. - */ -#define SEC2_NV_CMDQ_LOG_ID 0U -#define SEC2_NV_CMDQ_LOG_ID__LAST 0U -#define SEC2_NV_MSGQ_LOG_ID 1U -#define SEC2_QUEUE_NUM 2U - -struct sec2_init_msg_sec2_init { - u8 msg_type; - u8 num_queues; - - u16 os_debug_entry_point; - - struct - { - u32 queue_offset; - u16 queue_size; - u8 queue_phy_id; - u8 queue_log_id; - } q_info[SEC2_QUEUE_NUM]; - - u32 nv_managed_area_offset; - u16 nv_managed_area_size; -}; - -union nv_flcn_msg_sec2_init { - u8 msg_type; - struct sec2_init_msg_sec2_init sec2_init; -}; - -#endif /* NVGPU_SEC2_IF_SEC2_H */ -- cgit v1.2.2