From 01e6fac4d61fdd7fff5433942ec93fc2ea1e4df1 Mon Sep 17 00:00:00 2001 From: Joshua Bakita Date: Wed, 28 Jun 2023 18:24:25 -0400 Subject: Include nvgpu headers These are needed to build on NVIDIA's Jetson boards for the time being. Only a couple structs are required, so it should be fairly easy to remove this dependency at some point in the future. --- include/nvgpu/linux/atomic.h | 149 +++++++++++++++++++++++++++++++++ include/nvgpu/linux/barrier.h | 37 ++++++++ include/nvgpu/linux/cond.h | 81 ++++++++++++++++++ include/nvgpu/linux/dma.h | 38 +++++++++ include/nvgpu/linux/kmem.h | 47 +++++++++++ include/nvgpu/linux/lock.h | 81 ++++++++++++++++++ include/nvgpu/linux/nvgpu_mem.h | 89 ++++++++++++++++++++ include/nvgpu/linux/nvlink.h | 31 +++++++ include/nvgpu/linux/os_fence_android.h | 48 +++++++++++ include/nvgpu/linux/rwsem.h | 26 ++++++ include/nvgpu/linux/sim.h | 38 +++++++++ include/nvgpu/linux/sim_pci.h | 26 ++++++ include/nvgpu/linux/thread.h | 29 +++++++ include/nvgpu/linux/vm.h | 92 ++++++++++++++++++++ 14 files changed, 812 insertions(+) create mode 100644 include/nvgpu/linux/atomic.h create mode 100644 include/nvgpu/linux/barrier.h create mode 100644 include/nvgpu/linux/cond.h create mode 100644 include/nvgpu/linux/dma.h create mode 100644 include/nvgpu/linux/kmem.h create mode 100644 include/nvgpu/linux/lock.h create mode 100644 include/nvgpu/linux/nvgpu_mem.h create mode 100644 include/nvgpu/linux/nvlink.h create mode 100644 include/nvgpu/linux/os_fence_android.h create mode 100644 include/nvgpu/linux/rwsem.h create mode 100644 include/nvgpu/linux/sim.h create mode 100644 include/nvgpu/linux/sim_pci.h create mode 100644 include/nvgpu/linux/thread.h create mode 100644 include/nvgpu/linux/vm.h (limited to 'include/nvgpu/linux') diff --git a/include/nvgpu/linux/atomic.h b/include/nvgpu/linux/atomic.h new file mode 100644 index 0000000..0734672 --- /dev/null +++ b/include/nvgpu/linux/atomic.h @@ -0,0 +1,149 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __NVGPU_ATOMIC_LINUX_H__ +#define __NVGPU_ATOMIC_LINUX_H__ + +#ifdef __KERNEL__ +#include +#endif + +typedef struct nvgpu_atomic { + atomic_t atomic_var; +} nvgpu_atomic_t; + +typedef struct nvgpu_atomic64 { + atomic64_t atomic_var; +} nvgpu_atomic64_t; + +#define __nvgpu_atomic_init(i) { ATOMIC_INIT(i) } +#define __nvgpu_atomic64_init(i) { ATOMIC64_INIT(i) } + +static inline void __nvgpu_atomic_set(nvgpu_atomic_t *v, int i) +{ + atomic_set(&v->atomic_var, i); +} + +static inline int __nvgpu_atomic_read(nvgpu_atomic_t *v) +{ + return atomic_read(&v->atomic_var); +} + +static inline void __nvgpu_atomic_inc(nvgpu_atomic_t *v) +{ + atomic_inc(&v->atomic_var); +} + +static inline int __nvgpu_atomic_inc_return(nvgpu_atomic_t *v) +{ + return atomic_inc_return(&v->atomic_var); +} + +static inline void __nvgpu_atomic_dec(nvgpu_atomic_t *v) +{ + atomic_dec(&v->atomic_var); +} + +static inline int __nvgpu_atomic_dec_return(nvgpu_atomic_t *v) +{ + return atomic_dec_return(&v->atomic_var); +} + +static inline int __nvgpu_atomic_cmpxchg(nvgpu_atomic_t *v, int old, int new) +{ + return atomic_cmpxchg(&v->atomic_var, old, new); +} + +static inline int __nvgpu_atomic_xchg(nvgpu_atomic_t *v, int new) +{ + return atomic_xchg(&v->atomic_var, new); +} + +static inline bool __nvgpu_atomic_inc_and_test(nvgpu_atomic_t *v) +{ + return atomic_inc_and_test(&v->atomic_var); +} + +static inline bool __nvgpu_atomic_dec_and_test(nvgpu_atomic_t *v) +{ + return atomic_dec_and_test(&v->atomic_var); +} + +static inline bool __nvgpu_atomic_sub_and_test(int i, nvgpu_atomic_t *v) +{ + return atomic_sub_and_test(i, &v->atomic_var); +} + +static inline int __nvgpu_atomic_add_return(int i, nvgpu_atomic_t *v) +{ + return atomic_add_return(i, &v->atomic_var); +} + +static inline int __nvgpu_atomic_add_unless(nvgpu_atomic_t *v, int a, int u) +{ + return atomic_add_unless(&v->atomic_var, a, u); +} + +static inline void __nvgpu_atomic64_set(nvgpu_atomic64_t *v, long i) +{ + atomic64_set(&v->atomic_var, i); +} + +static inline long __nvgpu_atomic64_read(nvgpu_atomic64_t *v) +{ + return atomic64_read(&v->atomic_var); +} + +static inline void __nvgpu_atomic64_add(long x, nvgpu_atomic64_t *v) +{ + atomic64_add(x, &v->atomic_var); +} + +static inline void __nvgpu_atomic64_inc(nvgpu_atomic64_t *v) +{ + atomic64_inc(&v->atomic_var); +} + +static inline long __nvgpu_atomic64_inc_return(nvgpu_atomic64_t *v) +{ + return atomic64_inc_return(&v->atomic_var); +} + +static inline void __nvgpu_atomic64_dec(nvgpu_atomic64_t *v) +{ + atomic64_dec(&v->atomic_var); +} + +static inline void __nvgpu_atomic64_dec_return(nvgpu_atomic64_t *v) +{ + atomic64_dec_return(&v->atomic_var); +} + +static inline long __nvgpu_atomic64_cmpxchg(nvgpu_atomic64_t *v, + long old, long new) +{ + return atomic64_cmpxchg(&v->atomic_var, old, new); +} + +static inline void __nvgpu_atomic64_sub(long x, nvgpu_atomic64_t *v) +{ + atomic64_sub(x, &v->atomic_var); +} + +static inline long __nvgpu_atomic64_sub_return(long x, nvgpu_atomic64_t *v) +{ + return atomic64_sub_return(x, &v->atomic_var); +} +#endif /*__NVGPU_ATOMIC_LINUX_H__ */ diff --git a/include/nvgpu/linux/barrier.h b/include/nvgpu/linux/barrier.h new file mode 100644 index 0000000..ef867c4 --- /dev/null +++ b/include/nvgpu/linux/barrier.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __NVGPU_BARRIER_LINUX_H__ +#define __NVGPU_BARRIER_LINUX_H__ + +#include + +#define __nvgpu_mb() mb() +#define __nvgpu_rmb() rmb() +#define __nvgpu_wmb() wmb() + +#define __nvgpu_smp_mb() smp_mb() +#define __nvgpu_smp_rmb() smp_rmb() +#define __nvgpu_smp_wmb() smp_wmb() + +#define __nvgpu_read_barrier_depends() read_barrier_depends() +#define __nvgpu_smp_read_barrier_depends() smp_read_barrier_depends() + +#define __NV_ACCESS_ONCE(x) ACCESS_ONCE(x) + +#define __nvgpu_speculation_barrier() speculation_barrier() + +#endif /* __NVGPU_BARRIER_LINUX_H__ */ diff --git a/include/nvgpu/linux/cond.h b/include/nvgpu/linux/cond.h new file mode 100644 index 0000000..b53ada3 --- /dev/null +++ b/include/nvgpu/linux/cond.h @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __NVGPU_COND_LINUX_H__ +#define __NVGPU_COND_LINUX_H__ + +#include +#include + +struct nvgpu_cond { + bool initialized; + wait_queue_head_t wq; +}; + +/** + * NVGPU_COND_WAIT - Wait for a condition to be true + * + * @c - The condition variable to sleep on + * @condition - The condition that needs to be true + * @timeout_ms - Timeout in milliseconds, or 0 for infinite wait + * + * Wait for a condition to become true. Returns -ETIMEOUT if + * the wait timed out with condition false. + */ +#define NVGPU_COND_WAIT(c, condition, timeout_ms) \ +({\ + int ret = 0; \ + long _timeout_ms = timeout_ms;\ + if (_timeout_ms > 0) { \ + long _ret = wait_event_timeout((c)->wq, condition, \ + msecs_to_jiffies(_timeout_ms)); \ + if (_ret == 0) \ + ret = -ETIMEDOUT; \ + } else { \ + wait_event((c)->wq, condition); \ + } \ + ret;\ +}) + +/** + * NVGPU_COND_WAIT_INTERRUPTIBLE - Wait for a condition to be true + * + * @c - The condition variable to sleep on + * @condition - The condition that needs to be true + * @timeout_ms - Timeout in milliseconds, or 0 for infinite wait + * + * Wait for a condition to become true. Returns -ETIMEOUT if + * the wait timed out with condition false or -ERESTARTSYS on + * signal. + */ +#define NVGPU_COND_WAIT_INTERRUPTIBLE(c, condition, timeout_ms) \ +({ \ + int ret = 0; \ + long _timeout_ms = timeout_ms;\ + if (_timeout_ms > 0) { \ + long _ret = wait_event_interruptible_timeout((c)->wq, condition, \ + msecs_to_jiffies(_timeout_ms)); \ + if (_ret == 0) \ + ret = -ETIMEDOUT; \ + else if (_ret == -ERESTARTSYS) \ + ret = -ERESTARTSYS; \ + } else { \ + ret = wait_event_interruptible((c)->wq, condition); \ + } \ + ret; \ +}) + +#endif /* __NVGPU_LOCK_LINUX_H__ */ diff --git a/include/nvgpu/linux/dma.h b/include/nvgpu/linux/dma.h new file mode 100644 index 0000000..342b278 --- /dev/null +++ b/include/nvgpu/linux/dma.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __NVGPU_LINUX_DMA_H__ +#define __NVGPU_LINUX_DMA_H__ + +/** + * Functions used internally for building the backing SGTs for nvgpu_mems. + */ + + +int nvgpu_get_sgtable_attrs(struct gk20a *g, struct sg_table **sgt, + void *cpuva, u64 iova, + size_t size, unsigned long flags); + +int nvgpu_get_sgtable(struct gk20a *g, struct sg_table **sgt, + void *cpuva, u64 iova, size_t size); + +int nvgpu_get_sgtable_from_pages(struct gk20a *g, struct sg_table **sgt, + struct page **pages, u64 iova, + size_t size); + +void nvgpu_free_sgtable(struct gk20a *g, struct sg_table **sgt); + +#endif diff --git a/include/nvgpu/linux/kmem.h b/include/nvgpu/linux/kmem.h new file mode 100644 index 0000000..660aac9 --- /dev/null +++ b/include/nvgpu/linux/kmem.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __NVGPU_KMEM_LINUX_H__ +#define __NVGPU_KMEM_LINUX_H__ + +struct gk20a; +struct device; + +#ifdef CONFIG_NVGPU_TRACK_MEM_USAGE +void *__nvgpu_track_vmalloc(struct gk20a *g, unsigned long size, void *ip); +void *__nvgpu_track_vzalloc(struct gk20a *g, unsigned long size, void *ip); +void *__nvgpu_track_kmalloc(struct gk20a *g, size_t size, void *ip); +void *__nvgpu_track_kzalloc(struct gk20a *g, size_t size, void *ip); +void *__nvgpu_track_kcalloc(struct gk20a *g, size_t n, size_t size, void *ip); +void __nvgpu_track_vfree(struct gk20a *g, void *addr); +void __nvgpu_track_kfree(struct gk20a *g, void *addr); +#endif + +/** + * DOC: Linux pass through kmem implementation. + * + * These are the Linux implementations of the various kmem functions defined by + * nvgpu. This should not be included directly - instead include . + */ +void *__nvgpu_kmalloc(struct gk20a *g, size_t size, void *ip); +void *__nvgpu_kzalloc(struct gk20a *g, size_t size, void *ip); +void *__nvgpu_kcalloc(struct gk20a *g, size_t n, size_t size, void *ip); +void *__nvgpu_vmalloc(struct gk20a *g, unsigned long size, void *ip); +void *__nvgpu_vzalloc(struct gk20a *g, unsigned long size, void *ip); +void __nvgpu_kfree(struct gk20a *g, void *addr); +void __nvgpu_vfree(struct gk20a *g, void *addr); + +#endif diff --git a/include/nvgpu/linux/lock.h b/include/nvgpu/linux/lock.h new file mode 100644 index 0000000..fbf26e9 --- /dev/null +++ b/include/nvgpu/linux/lock.h @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef NVGPU_LOCK_LINUX_H +#define NVGPU_LOCK_LINUX_H + +#include +#include + +struct nvgpu_mutex { + struct mutex mutex; +}; +struct nvgpu_spinlock { + spinlock_t spinlock; +}; +struct nvgpu_raw_spinlock { + raw_spinlock_t spinlock; +}; + +static inline int nvgpu_mutex_init(struct nvgpu_mutex *mutex) +{ + mutex_init(&mutex->mutex); + return 0; +}; +static inline void nvgpu_mutex_acquire(struct nvgpu_mutex *mutex) +{ + mutex_lock(&mutex->mutex); +}; +static inline void nvgpu_mutex_release(struct nvgpu_mutex *mutex) +{ + mutex_unlock(&mutex->mutex); +}; +static inline int nvgpu_mutex_tryacquire(struct nvgpu_mutex *mutex) +{ + return mutex_trylock(&mutex->mutex); +}; +static inline void nvgpu_mutex_destroy(struct nvgpu_mutex *mutex) +{ + mutex_destroy(&mutex->mutex); +}; + +static inline void nvgpu_spinlock_init(struct nvgpu_spinlock *spinlock) +{ + spin_lock_init(&spinlock->spinlock); +}; +static inline void nvgpu_spinlock_acquire(struct nvgpu_spinlock *spinlock) +{ + spin_lock(&spinlock->spinlock); +}; +static inline void nvgpu_spinlock_release(struct nvgpu_spinlock *spinlock) +{ + spin_unlock(&spinlock->spinlock); +}; + +static inline void nvgpu_raw_spinlock_init(struct nvgpu_raw_spinlock *spinlock) +{ + raw_spin_lock_init(&spinlock->spinlock); +}; +static inline void nvgpu_raw_spinlock_acquire(struct nvgpu_raw_spinlock *spinlock) +{ + raw_spin_lock(&spinlock->spinlock); +}; +static inline void nvgpu_raw_spinlock_release(struct nvgpu_raw_spinlock *spinlock) +{ + raw_spin_unlock(&spinlock->spinlock); +}; + +#endif /* NVGPU_LOCK_LINUX_H */ diff --git a/include/nvgpu/linux/nvgpu_mem.h b/include/nvgpu/linux/nvgpu_mem.h new file mode 100644 index 0000000..e5f5031 --- /dev/null +++ b/include/nvgpu/linux/nvgpu_mem.h @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __NVGPU_LINUX_NVGPU_MEM_H__ +#define __NVGPU_LINUX_NVGPU_MEM_H__ + +struct page; +struct sg_table; +struct scatterlist; +struct nvgpu_sgt; + +struct gk20a; +struct nvgpu_mem; +struct nvgpu_gmmu_attrs; + +struct nvgpu_mem_priv { + struct page **pages; + struct sg_table *sgt; + unsigned long flags; +}; + +u64 nvgpu_mem_get_addr_sgl(struct gk20a *g, struct scatterlist *sgl); +struct nvgpu_sgt *nvgpu_mem_linux_sgt_create(struct gk20a *g, + struct sg_table *sgt); +void nvgpu_mem_linux_sgt_free(struct gk20a *g, struct nvgpu_sgt *sgt); +struct nvgpu_sgt *nvgpu_linux_sgt_create(struct gk20a *g, + struct sg_table *sgt); +/** + * __nvgpu_mem_create_from_pages - Create an nvgpu_mem from physical pages. + * + * @g - The GPU. + * @dest - nvgpu_mem to initialize. + * @pages - A list of page pointers. + * @nr_pages - The number of pages in @pages. + * + * Create a new nvgpu_mem struct from a pre-existing list of physical pages. The + * pages need not be contiguous (the underlying scatter gather list will help + * with that). However, note, this API will explicitly make it so that the GMMU + * mapping code bypasses SMMU access for the passed pages. This allows one to + * make mem_descs that describe MMIO regions or other non-DRAM things. + * + * This only works for SYSMEM (or other things like SYSMEM - basically just not + * VIDMEM). Also, this API is only available for Linux as it heavily depends on + * the notion of struct %page. + * + * The resulting nvgpu_mem should be released with the nvgpu_dma_free() or the + * nvgpu_dma_unmap_free() function depending on whether or not the resulting + * nvgpu_mem has been mapped. The underlying pages themselves must be cleaned up + * by the caller of this API. + * + * Returns 0 on success, or a relevant error otherwise. + */ +int __nvgpu_mem_create_from_pages(struct gk20a *g, struct nvgpu_mem *dest, + struct page **pages, int nr_pages); + +/** + * __nvgpu_mem_create_from_phys - Create an nvgpu_mem from physical mem. + * + * @g - The GPU. + * @dest - nvgpu_mem to initialize. + * @src_phys - start address of physical mem + * @nr_pages - The number of pages in phys. + * + * Create a new nvgpu_mem struct from a physical memory aperure. The physical + * memory aperture needs to be contiguous for requested @nr_pages. This API + * only works for SYSMEM. + * + * The resulting nvgpu_mem should be released with the nvgpu_dma_free() or the + * nvgpu_dma_unmap_free() function depending on whether or not the resulting + * nvgpu_mem has been mapped. + * + * Returns 0 on success, or a relevant error otherwise. + */ +int __nvgpu_mem_create_from_phys(struct gk20a *g, struct nvgpu_mem *dest, + u64 src_phys, int nr_pages); +#endif diff --git a/include/nvgpu/linux/nvlink.h b/include/nvgpu/linux/nvlink.h new file mode 100644 index 0000000..550a897 --- /dev/null +++ b/include/nvgpu/linux/nvlink.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __NVGPU_LINUX_NVLINK_H__ +#define __NVGPU_LINUX_NVLINK_H__ + +#ifdef CONFIG_TEGRA_NVLINK +#include +#include +#endif + +#endif diff --git a/include/nvgpu/linux/os_fence_android.h b/include/nvgpu/linux/os_fence_android.h new file mode 100644 index 0000000..201b530 --- /dev/null +++ b/include/nvgpu/linux/os_fence_android.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __NVGPU_OS_FENCE_ANDROID_H__ +#define __NVGPU_OS_FENCE_ANDROID_H__ + +struct gk20a; +struct nvgpu_os_fence; +struct sync_fence; +struct channel_gk20a; + +struct sync_fence *nvgpu_get_sync_fence(struct nvgpu_os_fence *s); + +void nvgpu_os_fence_android_drop_ref(struct nvgpu_os_fence *s); + +int nvgpu_os_fence_sema_fdget(struct nvgpu_os_fence *fence_out, + struct channel_gk20a *c, int fd); + +void nvgpu_os_fence_init(struct nvgpu_os_fence *fence_out, + struct gk20a *g, const struct nvgpu_os_fence_ops *fops, + struct sync_fence *fence); + +void nvgpu_os_fence_android_install_fd(struct nvgpu_os_fence *s, int fd); + +int nvgpu_os_fence_syncpt_fdget( + struct nvgpu_os_fence *fence_out, + struct channel_gk20a *c, int fd); + +#endif /* __NVGPU_OS_FENCE_ANDROID_H__ */ \ No newline at end of file diff --git a/include/nvgpu/linux/rwsem.h b/include/nvgpu/linux/rwsem.h new file mode 100644 index 0000000..7d073d3 --- /dev/null +++ b/include/nvgpu/linux/rwsem.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __NVGPU_RWSEM_LINUX_H__ +#define __NVGPU_RWSEM_LINUX_H__ + +#include + +struct nvgpu_rwsem { + struct rw_semaphore rwsem; +}; + +#endif diff --git a/include/nvgpu/linux/sim.h b/include/nvgpu/linux/sim.h new file mode 100644 index 0000000..99c6348 --- /dev/null +++ b/include/nvgpu/linux/sim.h @@ -0,0 +1,38 @@ +/* + * + * nvgpu sim support + * + * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __SIM_LINUX_H__ +#define __SIM_LINUX_H__ + +struct platform_device; + +struct sim_nvgpu_linux { + struct sim_nvgpu sim; + struct resource *reg_mem; + void __iomem *regs; + void (*remove_support_linux)(struct gk20a *g); +}; + +void sim_writel(struct sim_nvgpu *sim, u32 r, u32 v); +u32 sim_readl(struct sim_nvgpu *sim, u32 r); + +int nvgpu_init_sim_support_linux(struct gk20a *g, + struct platform_device *dev); +void nvgpu_remove_sim_support_linux(struct gk20a *g); +#endif diff --git a/include/nvgpu/linux/sim_pci.h b/include/nvgpu/linux/sim_pci.h new file mode 100644 index 0000000..b248f07 --- /dev/null +++ b/include/nvgpu/linux/sim_pci.h @@ -0,0 +1,26 @@ +/* + * + * nvgpu sim support pci + * + * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __SIM_PCI_LINUX_H__ +#define __SIM_PCI_LINUX_H__ + +int nvgpu_init_sim_support_linux_pci(struct gk20a *g); +void nvgpu_remove_sim_support_linux_pci(struct gk20a *g); + +#endif diff --git a/include/nvgpu/linux/thread.h b/include/nvgpu/linux/thread.h new file mode 100644 index 0000000..1355319 --- /dev/null +++ b/include/nvgpu/linux/thread.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __NVGPU_THREAD_LINUX_H__ +#define __NVGPU_THREAD_LINUX_H__ + +struct task_struct; + +struct nvgpu_thread { + struct task_struct *task; + bool running; + int (*fn)(void *); + void *data; +}; + +#endif /* __NVGPU_THREAD_LINUX_H__ */ diff --git a/include/nvgpu/linux/vm.h b/include/nvgpu/linux/vm.h new file mode 100644 index 0000000..6f3beaa --- /dev/null +++ b/include/nvgpu/linux/vm.h @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __COMMON_LINUX_VM_PRIV_H__ +#define __COMMON_LINUX_VM_PRIV_H__ + +#include + +#include + +/* + * Couple of places explicitly flush caches still. Any DMA buffer we allocate + * from within the GPU is writecombine and as a result does not need this but + * there seem to be exceptions. + */ +#ifdef CONFIG_ARM64 +#define outer_flush_range(a, b) +#define __cpuc_flush_dcache_area __flush_dcache_area +#endif + +struct sg_table; +struct dma_buf; +struct device; + +struct vm_gk20a; +struct vm_gk20a_mapping_batch; +struct nvgpu_vm_area; + +struct nvgpu_os_buffer { + struct dma_buf *dmabuf; + struct dma_buf_attachment *attachment; + struct device *dev; +}; + +struct nvgpu_mapped_buf_priv { + struct dma_buf *dmabuf; + struct dma_buf_attachment *attachment; + struct sg_table *sgt; +}; + +/* NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL must be set */ +int nvgpu_vm_map_linux(struct vm_gk20a *vm, + struct dma_buf *dmabuf, + u64 map_addr, + u32 flags, + u32 page_size, + s16 compr_kind, + s16 incompr_kind, + int rw_flag, + u64 buffer_offset, + u64 mapping_size, + struct vm_gk20a_mapping_batch *mapping_batch, + u64 *gpu_va); + +/* + * Notes: + * - Batch may be NULL if map op is not part of a batch. + * - NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL must be set + */ +int nvgpu_vm_map_buffer(struct vm_gk20a *vm, + int dmabuf_fd, + u64 *map_addr, + u32 flags, /* NVGPU_AS_MAP_BUFFER_FLAGS_ */ + u32 page_size, + s16 compr_kind, + s16 incompr_kind, + u64 buffer_offset, + u64 mapping_size, + struct vm_gk20a_mapping_batch *batch); + +/* find buffer corresponding to va */ +int nvgpu_vm_find_buf(struct vm_gk20a *vm, u64 gpu_va, + struct dma_buf **dmabuf, + u64 *offset); + +enum nvgpu_aperture gk20a_dmabuf_aperture(struct gk20a *g, + struct dma_buf *dmabuf); + +#endif -- cgit v1.2.2