From 71c6ab5ac5270d3e1c2fb809667225add109ec6b Mon Sep 17 00:00:00 2001 From: Joshua Bakita Date: Tue, 23 Apr 2024 11:09:51 -0400 Subject: Document Turing- Channel Ram and improve channel detail printer --- nvdebug.h | 41 ++++++++++++++++++++++++++++++++++------- runlist_procfs.c | 36 ++++++++---------------------------- 2 files changed, 42 insertions(+), 35 deletions(-) diff --git a/nvdebug.h b/nvdebug.h index 9e0058d..e9ae3db 100644 --- a/nvdebug.h +++ b/nvdebug.h @@ -365,7 +365,32 @@ enum CHANNEL_STATUS { 512-entry array of channel control and status data structures. - Support: Fermi, Maxwell, Pascal, Volta, Turing, [more?] + === Read/Write Fields === + INST_PTR : Top 28 of 40 bits of page-aligned channel instance block. + Instance Block = (uint64_t)inst_ptr << 12. + INST_TARGET : Aperture of INST_PTR. + INST_BIND : Is the channel instance bound? + NEXT : Is this the next channel to be scheduled in the runlist? + + === Read-Only Fields === + ENABLE : Is this channel enabled? (Disabled channels are skipped + over by the runlist scheduler.) + PBDMA_FAULTED^ : [UNKNOWN] + ENG_FAULTED^ : [UNKNOWN] + STATUS : Status of this channel in regards to hardware. See enum + CHANNEL_STATUS. + BUSY : [UNKNOWN] + ^Field can be reset with a non-zero write. + + === Write-Only Fields === + FORCE_CTX_RELOAD : [UNKNOWN] + ENABLE_SET : Enables the channel upon non-zero write. + ENABLE_CLEAR : Disables the channel upon non-zero write. + FORCE_PBDMA_FAULTED* : [UNKNOWN] + FORCE_ENG_FAULTED* : [UNKNOWN] + *Field only available on Turing. + + Support: Fermi, Maxwell, Pascal, Volta, Turing */ #define NV_PCCSR_CHANNEL_INST(i) (0x00800000+(i)*8) #define MAX_CHID 512 @@ -374,22 +399,24 @@ typedef union { // 0:31 uint32_t inst_ptr:28; enum INST_TARGET inst_target:2; - uint32_t padding0:1; + uint32_t :1; bool inst_bind:1; -// 32:64 +// 32:63 bool enable:1; bool next:1; - uint32_t padding:6; + uint32_t :6; bool force_ctx_reload:1; - uint32_t padding2:1; + uint32_t :1; bool enable_set:1; bool enable_clear:1; - uint32_t padding3:10; + uint32_t :8; + bool force_pbdma_faulted:1; + bool force_eng_faulted:1; bool pbdma_faulted:1; bool eng_faulted:1; enum CHANNEL_STATUS status:4; bool busy:1; - uint32_t padding4:3; + uint32_t :3; } __attribute__((packed)); uint64_t raw; } channel_ctrl_t; diff --git a/runlist_procfs.c b/runlist_procfs.c index f569c77..986465d 100644 --- a/runlist_procfs.c +++ b/runlist_procfs.c @@ -6,51 +6,32 @@ #define RUNLIST_PROCFS_NAME "runlist" #define DETAILED_CHANNEL_INFO +#ifdef DETAILED_CHANNEL_INFO /* Print channel details using PCCSR (Programmable Channel Control System RAM?) * @param s Pointer to state from seq_file subsystem to pass to seq_printf * @param g Pointer to our internal GPU state * @param chid ID of channel to print details on, range [0, 512) * @param prefix Text string to prefix each line with, or empty string */ -#ifdef DETAILED_CHANNEL_INFO static int runlist_detail_seq_show_chan(struct seq_file *s, struct nvdebug_state *g, uint32_t chid, char *prefix) { channel_ctrl_t chan; - const char *loc_txt; uint64_t instance_ptr; - chan.raw = nvdebug_readq(g, NV_PCCSR_CHANNEL_INST(chid)); - loc_txt = target_to_text(chan.inst_target); - if (!loc_txt) + if ((chan.raw = nvdebug_readq(g, NV_PCCSR_CHANNEL_INST(chid))) == -1) return -EIO; - instance_ptr = chan.inst_ptr; - instance_ptr <<= 12; + instance_ptr = (uint64_t)chan.inst_ptr << 12; + // Don't print write-only fields seq_printf(s, "%s+- Channel Info %-4d -+\n", prefix, chid); seq_printf(s, "%s| Enabled: %d|\n", prefix, chan.enable); seq_printf(s, "%s| Next: %d|\n", prefix, chan.next); - seq_printf(s, "%s| Force CTX Reload: %d|\n", prefix, chan.force_ctx_reload); - seq_printf(s, "%s| Enable set: %d|\n", prefix, chan.enable_set); - seq_printf(s, "%s| Enable clear: %d|\n", prefix, chan.enable_clear); seq_printf(s, "%s| PBDMA Faulted: %d|\n", prefix, chan.pbdma_faulted); seq_printf(s, "%s| ENG Faulted: %d|\n", prefix, chan.eng_faulted); seq_printf(s, "%s| Status: %2d|\n", prefix, chan.status); seq_printf(s, "%s| Busy: %d|\n", prefix, chan.busy); seq_printf(s, "%s| Instance PTR: |\n", prefix); seq_printf(s, "%s| %#018llx|\n", prefix, instance_ptr); - seq_printf(s, "%s| %20s|\n", prefix, loc_txt); + seq_printf(s, "%s| %20s|\n", prefix, target_to_text(chan.inst_target)); seq_printf(s, "%s| Instance bound: %d|\n", prefix, chan.inst_bind); - // START TEMP - // "runlist_id -1 is synonym for the ENGINE_GR_GK20A runlist id" - // GR, GRCE, and ASYNC_CE - // Note that this appears to be broken?? - // Peek into the channel instance RAM - if (chan.inst_target == TARGET_SYS_MEM_COHERENT) { - seq_printf(s, "%s| Target Engine: %2d|\n", prefix, *(uint32_t*)phys_to_virt(instance_ptr + 4/*bytes for 32bits*/*43/*NV_RAMFC_TARGET*/) & 0x1f); - seq_printf(s, "%s| PDB LO: %#08x|\n", prefix, *(uint32_t*)phys_to_virt(instance_ptr + 4/*bytes for 32bits*/*128/*NV_RAMIN_PAGE_DIR_BASE_LO*/) & 0xfffff000); - seq_printf(s, "%s| Num subcontexts: %2ld|\n", prefix, hweight64(*(uint64_t*)phys_to_virt(instance_ptr + 4/*bytes for 32bits*/*166/*NV_RAMIN_SC_PDB_VALID*/))); - // This appears to be unset on Xavier - //seq_printf(s, "%s| PAS ID: %8ld|\n", prefix, *(uint32_t*)phys_to_virt(instance_ptr + 4/*bytes for 32bits*/*135/*NV_RAMIN_PASID*/) & 0xfffff); - } - // END TEMP seq_printf(s, "%s+---------------------+\n", prefix); return 0; } @@ -136,14 +117,14 @@ static int runlist_file_seq_show(struct seq_file *s, void *raw_rl_iter) { seq_printf(s, "+---------------------+\n"); } else { char *indt = ""; -#ifndef DETAILED_CHANNEL_INFO u64 instance_ptr = 0; -#endif + if (rl_iter->entries_left_in_tsg) indt = " "; #ifdef DETAILED_CHANNEL_INFO runlist_detail_seq_show_chan(s, g, chid(g, entry), indt); -#else + return 0; +#endif // Reconstruct pointer to channel instance block if (g->chip_id >= NV_CHIP_ID_VOLTA) { instance_ptr = ((struct gv100_runlist_chan*)entry)->inst_ptr_hi; @@ -159,7 +140,6 @@ static int runlist_file_seq_show(struct seq_file *s, void *raw_rl_iter) { seq_printf(s, "%s| %#018llx|\n", indt, instance_ptr); seq_printf(s, "%s| %20s|\n", indt, target_to_text(inst_target(g, entry))); seq_printf(s, "%s+---------------------+\n", indt); -#endif } return 0; } -- cgit v1.2.2