1 files changed, 5 insertions, 2 deletions

diff --git a/nvdebug_entry.c b/nvdebug_entry.c
index f3dcdbb..24fcd32 100644
--- a/nvdebug_entry.c
+++ b/nvdebug_entry.c
@@ -22,16 +22,19 @@ MODULE_LICENSE("Dual MIT/GPL");
 MODULE_AUTHOR("Joshua Bakita");
 MODULE_DESCRIPTION("A scheduling debugging module for NVIDIA GPUs");
 
+// runlist_procfs.c
 extern struct file_operations runlist_file_ops;
 extern struct file_operations preempt_tsg_file_ops;
 extern struct file_operations disable_channel_file_ops;
 extern struct file_operations enable_channel_file_ops;
 extern struct file_operations switch_to_tsg_file_ops;
+// device_info_procfs.c
 extern struct file_operations device_info_file_ops;
-extern struct file_operations copy_topology_file_ops;
 extern struct file_operations nvdebug_read_reg32_file_ops;
 extern struct file_operations nvdebug_read_reg_range_file_ops;
 extern struct file_operations local_memory_file_ops;
+// copy_topology_procfs.c
+extern struct file_operations copy_topology_file_ops;
 
 struct nvdebug_state g_nvdebug_state[NVDEBUG_MAX_DEVICES];
 unsigned int g_nvdebug_devices = 0;
@@ -194,7 +197,7 @@ int create_tpc_mask_files(int device_id, struct proc_dir_entry *dir) {
         int i;
         struct proc_dir_entry *gpc_tpc_mask_entry;
         // Get maximum number of enabled GPCs for this chip
-        uint32_t max_gpcs = nvdebug_readl(&g_nvdebug_state[device_id], NV_PTOP_SCAL_NUM_GPCS);
+        uint32_t max_gpcs = nvdebug_readl(g, NV_PTOP_SCAL_NUM_GPCS);
         // Get a bitmask of which GPCs are disabled
         uint32_t gpcs_mask;
         if (g->chip_id < NV_CHIP_ID_AMPERE)