1 files changed, 34 insertions, 7 deletions

diff --git a/nvdebug.h b/nvdebug.h
index 9e0058d..e9ae3db 100644
--- a/nvdebug.h
+++ b/nvdebug.h
@@ -365,7 +365,32 @@ enum CHANNEL_STATUS {
 
   512-entry array of channel control and status data structures.
 
-  Support: Fermi, Maxwell, Pascal, Volta, Turing, [more?]
+  === Read/Write Fields ===
+  INST_PTR             : Top 28 of 40 bits of page-aligned channel instance block.
+                         Instance Block = (uint64_t)inst_ptr << 12.
+  INST_TARGET          : Aperture of INST_PTR.
+  INST_BIND            : Is the channel instance bound?
+  NEXT                 : Is this the next channel to be scheduled in the runlist?
+
+  === Read-Only Fields ===
+  ENABLE               : Is this channel enabled? (Disabled channels are skipped
+                         over by the runlist scheduler.)
+  PBDMA_FAULTED^       : [UNKNOWN]
+  ENG_FAULTED^         : [UNKNOWN]
+  STATUS               : Status of this channel in regards to hardware. See enum
+                         CHANNEL_STATUS.
+  BUSY                 : [UNKNOWN]
+  ^Field can be reset with a non-zero write.
+
+  === Write-Only Fields ===
+  FORCE_CTX_RELOAD     : [UNKNOWN]
+  ENABLE_SET           : Enables the channel upon non-zero write.
+  ENABLE_CLEAR         : Disables the channel upon non-zero write.
+  FORCE_PBDMA_FAULTED* : [UNKNOWN]
+  FORCE_ENG_FAULTED*   : [UNKNOWN]
+  *Field only available on Turing.
+
+  Support: Fermi, Maxwell, Pascal, Volta, Turing
 */
 #define NV_PCCSR_CHANNEL_INST(i) (0x00800000+(i)*8)
 #define MAX_CHID 512
@@ -374,22 +399,24 @@ typedef union {
 // 0:31
                 uint32_t inst_ptr:28;
                 enum INST_TARGET inst_target:2;
-                 uint32_t padding0:1;
+                 uint32_t :1;
                 bool inst_bind:1;
-// 32:64
+// 32:63
                 bool enable:1;
                 bool next:1;
-                 uint32_t padding:6;
+                 uint32_t :6;
                 bool force_ctx_reload:1;
-                 uint32_t padding2:1;
+                 uint32_t :1;
                 bool enable_set:1;
                 bool enable_clear:1;
-                 uint32_t padding3:10;
+                 uint32_t :8;
+                bool force_pbdma_faulted:1;
+                bool force_eng_faulted:1;
                 bool pbdma_faulted:1;
                 bool eng_faulted:1;
                 enum CHANNEL_STATUS status:4;
                 bool busy:1;
-                 uint32_t padding4:3;
+                 uint32_t :3;
         } __attribute__((packed));
         uint64_t raw;
 } channel_ctrl_t;