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-rw-r--r--nvdebug.h20
1 files changed, 15 insertions, 5 deletions
diff --git a/nvdebug.h b/nvdebug.h
index 6a2383e..7564f8c 100644
--- a/nvdebug.h
+++ b/nvdebug.h
@@ -274,7 +274,7 @@ typedef union {
274 274
275 We only document the *_PFIFO_ENG_RUNLIST_*(i) read-only registers here (where 275 We only document the *_PFIFO_ENG_RUNLIST_*(i) read-only registers here (where
276 i is a runlist index). Runlists are configured via the seperate, writable 276 i is a runlist index). Runlists are configured via the seperate, writable
277 *_PFIFO_RUNLIST_* register; see open-gpu-doc for more on that. 277 *_PFIFO_RUNLIST_* register; see open-gpu-doc for more.
278 278
279 LEN : Number of entries in runlist 279 LEN : Number of entries in runlist
280 IS_PENDING : Is runlist committed? 280 IS_PENDING : Is runlist committed?
@@ -284,18 +284,25 @@ typedef union {
284 Support: Fermi*, Kepler, Maxwell, Pascal, Volta 284 Support: Fermi*, Kepler, Maxwell, Pascal, Volta
285 *Fermi may expose this information 8 bytes earlier, starting at 0x227C? 285 *Fermi may expose this information 8 bytes earlier, starting at 0x227C?
286*/ 286*/
287#define NV_PFIFO_RUNLIST_BASE_GF100 0x00002270 // Write-only
287#define NV_PFIFO_ENG_RUNLIST_BASE_GF100(i) (0x00002280+(i)*8) // Read-only 288#define NV_PFIFO_ENG_RUNLIST_BASE_GF100(i) (0x00002280+(i)*8) // Read-only
288typedef union { 289typedef union {
289 struct { 290 struct {
290 // NV_PFIFO_ENG_RUNLIST_BASE_* fields 291 // NV_PFIFO_ENG_RUNLIST_BASE_* fields
291 uint32_t ptr:28; 292 uint32_t ptr:28;
292 enum INST_TARGET target:2; 293 enum INST_TARGET target:2;
293 uint32_t padding1:2; 294 uint32_t :2;
294 // NV_PFIFO_ENG_RUNLIST_* fields 295 // NV_PFIFO_ENG_RUNLIST_* fields
295 uint16_t len:16; 296 uint16_t len:16;
296 uint32_t padding2:4; 297 uint32_t :4;
297 bool is_pending:1; 298 bool is_pending:1; // Read-only from NV_PFIFO_ENG_RUNLIST...
298 uint32_t padding3:11; 299 uint32_t :11;
300 } __attribute__((packed));
301 struct {
302 // NV_PFIFO_RUNLIST_* fields that differ from NV_PFIFO_ENG_RUNLIST_*
303 uint64_t :52;
304 uint32_t id:4; // Write-only to NV_PFIFO_RUNLIST...
305 uint32_t :8;
299 } __attribute__((packed)); 306 } __attribute__((packed));
300 uint64_t raw; 307 uint64_t raw;
301} eng_runlist_gf100_t; 308} eng_runlist_gf100_t;
@@ -311,6 +318,9 @@ typedef union {
311// Support: Turing 318// Support: Turing
312#define NV_PFIFO_RUNLIST_BASE_TU102(i) (0x00002B00+(i)*16) // Read/write 319#define NV_PFIFO_RUNLIST_BASE_TU102(i) (0x00002B00+(i)*16) // Read/write
313#define NV_PFIFO_RUNLIST_SUBMIT_TU102(i) (0x00002B08+(i)*16) // Read/write 320#define NV_PFIFO_RUNLIST_SUBMIT_TU102(i) (0x00002B08+(i)*16) // Read/write
321// Derived absolute maximum number of runlists
322#define MAX_RUNLISTS_TU102 80 // On Turing; another register is at 0x00003000
323#define MAX_RUNLISTS_GF100 34 // On Volta-; another register is at 0x00002390
314typedef union { 324typedef union {
315 struct { 325 struct {
316 enum INST_TARGET target:2; 326 enum INST_TARGET target:2;