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diff --git a/include/volt/volt_pmu.h b/include/volt/volt_pmu.h
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1/*
2* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3*
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21*/
22
23#ifndef NVGPU_VOLT_PMU_H
24#define NVGPU_VOLT_PMU_H
25
26u32 volt_pmu_send_load_cmd_to_pmu(struct gk20a *g);
27u32 volt_set_voltage(struct gk20a *g, u32 logic_voltage_uv,
28 u32 sram_voltage_uv);
29u32 volt_get_voltage(struct gk20a *g, u32 volt_domain, u32 *voltage_uv);
30int volt_set_noiseaware_vmin(struct gk20a *g, u32 logic_voltage_uv,
31 u32 sram_voltage_uv);
32
33u32 nvgpu_volt_set_voltage_gp10x(struct gk20a *g, u32 logic_voltage_uv,
34 u32 sram_voltage_uv);
35u32 nvgpu_volt_rail_get_voltage_gp10x(struct gk20a *g,
36 u8 volt_domain, u32 *pvoltage_uv);
37u32 nvgpu_volt_send_load_cmd_to_pmu_gp10x(struct gk20a *g);
38
39u32 nvgpu_volt_set_voltage_gv10x(struct gk20a *g, u32 logic_voltage_uv,
40 u32 sram_voltage_uv);
41u32 nvgpu_volt_rail_get_voltage_gv10x(struct gk20a *g,
42 u8 volt_domain, u32 *pvoltage_uv);
43u32 nvgpu_volt_send_load_cmd_to_pmu_gv10x(struct gk20a *g);
44
45
46#endif /* NVGPU_VOLT_PMU_H */