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Diffstat (limited to 'include/pmgr/pwrdev.h')
-rw-r--r-- | include/pmgr/pwrdev.h | 60 |
1 files changed, 0 insertions, 60 deletions
diff --git a/include/pmgr/pwrdev.h b/include/pmgr/pwrdev.h deleted file mode 100644 index 4bcf65a..0000000 --- a/include/pmgr/pwrdev.h +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* | ||
2 | * general power device structures & definitions | ||
3 | * | ||
4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the "Software"), | ||
8 | * to deal in the Software without restriction, including without limitation | ||
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
10 | * and/or sell copies of the Software, and to permit persons to whom the | ||
11 | * Software is furnished to do so, subject to the following conditions: | ||
12 | * | ||
13 | * The above copyright notice and this permission notice shall be included in | ||
14 | * all copies or substantial portions of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | #ifndef NVGPU_PMGR_PWRDEV_H | ||
25 | #define NVGPU_PMGR_PWRDEV_H | ||
26 | |||
27 | #include "boardobj/boardobj.h" | ||
28 | #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> | ||
29 | #include "ctrl/ctrlpmgr.h" | ||
30 | |||
31 | #define PWRDEV_I2CDEV_DEVICE_INDEX_NONE (0xFF) | ||
32 | |||
33 | #define PWR_DEVICE_PROV_NUM_DEFAULT 1 | ||
34 | |||
35 | struct pwr_device { | ||
36 | struct boardobj super; | ||
37 | u8 power_rail; | ||
38 | u8 i2c_dev_idx; | ||
39 | bool bIs_inforom_config; | ||
40 | u32 power_corr_factor; | ||
41 | }; | ||
42 | |||
43 | struct pwr_devices { | ||
44 | struct boardobjgrp_e32 super; | ||
45 | }; | ||
46 | |||
47 | struct pwr_device_ina3221 { | ||
48 | struct pwr_device super; | ||
49 | struct ctrl_pmgr_pwr_device_info_rshunt | ||
50 | r_shuntm_ohm[NV_PMU_PMGR_PWR_DEVICE_INA3221_CH_NUM]; | ||
51 | u16 configuration; | ||
52 | u16 mask_enable; | ||
53 | u8 gpio_function; | ||
54 | u16 curr_correct_m; | ||
55 | s16 curr_correct_b; | ||
56 | } ; | ||
57 | |||
58 | int pmgr_device_sw_setup(struct gk20a *g); | ||
59 | |||
60 | #endif /* NVGPU_PMGR_PWRDEV_H */ | ||