diff options
Diffstat (limited to 'include/os/posix/fuse.c')
-rw-r--r-- | include/os/posix/fuse.c | 54 |
1 files changed, 0 insertions, 54 deletions
diff --git a/include/os/posix/fuse.c b/include/os/posix/fuse.c deleted file mode 100644 index 09ec36d..0000000 --- a/include/os/posix/fuse.c +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #include <nvgpu/fuse.h> | ||
24 | |||
25 | int nvgpu_tegra_get_gpu_speedo_id(struct gk20a *g) | ||
26 | { | ||
27 | return 0; | ||
28 | } | ||
29 | |||
30 | void nvgpu_tegra_fuse_write_bypass(struct gk20a *g, u32 val) | ||
31 | { | ||
32 | } | ||
33 | |||
34 | void nvgpu_tegra_fuse_write_access_sw(struct gk20a *g, u32 val) | ||
35 | { | ||
36 | } | ||
37 | |||
38 | void nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(struct gk20a *g, u32 val) | ||
39 | { | ||
40 | } | ||
41 | |||
42 | void nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(struct gk20a *g, u32 val) | ||
43 | { | ||
44 | } | ||
45 | |||
46 | int nvgpu_tegra_fuse_read_gcplex_config_fuse(struct gk20a *g, u32 *val) | ||
47 | { | ||
48 | return -ENODEV; | ||
49 | } | ||
50 | |||
51 | int nvgpu_tegra_fuse_read_reserved_calib(struct gk20a *g, u32 *val) | ||
52 | { | ||
53 | return -ENODEV; | ||
54 | } | ||