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-rw-r--r--include/os/linux/pci.c854
1 files changed, 0 insertions, 854 deletions
diff --git a/include/os/linux/pci.c b/include/os/linux/pci.c
deleted file mode 100644
index 07071d1..0000000
--- a/include/os/linux/pci.c
+++ /dev/null
@@ -1,854 +0,0 @@
1/*
2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include <linux/pci.h>
18#include <linux/interrupt.h>
19#include <linux/pm_runtime.h>
20#include <linux/of_platform.h>
21#include <linux/of_address.h>
22
23#include <nvgpu/nvhost.h>
24#include <nvgpu/nvgpu_common.h>
25#include <nvgpu/kmem.h>
26#include <nvgpu/enabled.h>
27#include <nvgpu/nvlink.h>
28#include <nvgpu/soc.h>
29#include <nvgpu/sim.h>
30#include <nvgpu/gk20a.h>
31
32#include "nvlink.h"
33#include "clk/clk.h"
34#include "clk/clk_mclk.h"
35#include "module.h"
36#include "intr.h"
37#include "sysfs.h"
38#include "os_linux.h"
39#include "platform_gk20a.h"
40
41#include "pci.h"
42#include "pci_usermode.h"
43
44#include "driver_common.h"
45
46#define PCI_INTERFACE_NAME "card-%s%%s"
47
48static int nvgpu_pci_tegra_probe(struct device *dev)
49{
50 return 0;
51}
52
53static int nvgpu_pci_tegra_remove(struct device *dev)
54{
55 return 0;
56}
57
58static bool nvgpu_pci_tegra_is_railgated(struct device *pdev)
59{
60 return false;
61}
62
63static long nvgpu_pci_clk_round_rate(struct device *dev, unsigned long rate)
64{
65 long ret = (long)rate;
66
67 if (rate == UINT_MAX)
68 ret = BOOT_GPC2CLK_MHZ * 1000000UL;
69
70 return ret;
71}
72
73static struct gk20a_platform nvgpu_pci_device[] = {
74 { /* DEVICE=0x1c35 */
75 /* ptimer src frequency in hz */
76 .ptimer_src_freq = 31250000,
77
78 .probe = nvgpu_pci_tegra_probe,
79 .remove = nvgpu_pci_tegra_remove,
80
81 /* power management configuration */
82 .railgate_delay_init = 500,
83 .can_railgate_init = false,
84 .can_elpg_init = true,
85 .enable_elpg = true,
86 .enable_elcg = false,
87 .enable_slcg = true,
88 .enable_blcg = true,
89 .enable_mscg = true,
90 .can_slcg = true,
91 .can_blcg = true,
92 .can_elcg = true,
93
94 .disable_aspm = true,
95
96 /* power management callbacks */
97 .is_railgated = nvgpu_pci_tegra_is_railgated,
98 .clk_round_rate = nvgpu_pci_clk_round_rate,
99
100 .ch_wdt_timeout_ms = 7000,
101
102 .honors_aperture = true,
103 .dma_mask = DMA_BIT_MASK(40),
104 .vbios_min_version = 0x86063000,
105 .hardcode_sw_threshold = true,
106 .ina3221_dcb_index = 0,
107 .ina3221_i2c_address = 0x84,
108 .ina3221_i2c_port = 0x2,
109 },
110 { /* DEVICE=0x1c36 */
111 /* ptimer src frequency in hz */
112 .ptimer_src_freq = 31250000,
113
114 .probe = nvgpu_pci_tegra_probe,
115 .remove = nvgpu_pci_tegra_remove,
116
117 /* power management configuration */
118 .railgate_delay_init = 500,
119 .can_railgate_init = false,
120 .can_elpg_init = true,
121 .enable_elpg = true,
122 .enable_elcg = false,
123 .enable_slcg = true,
124 .enable_blcg = true,
125 .enable_mscg = true,
126 .can_slcg = true,
127 .can_blcg = true,
128 .can_elcg = true,
129
130 .disable_aspm = true,
131
132 /* power management callbacks */
133 .is_railgated = nvgpu_pci_tegra_is_railgated,
134 .clk_round_rate = nvgpu_pci_clk_round_rate,
135
136 .ch_wdt_timeout_ms = 7000,
137
138 .honors_aperture = true,
139 .dma_mask = DMA_BIT_MASK(40),
140 .vbios_min_version = 0x86062d00,
141 .hardcode_sw_threshold = true,
142 .ina3221_dcb_index = 0,
143 .ina3221_i2c_address = 0x84,
144 .ina3221_i2c_port = 0x2,
145 },
146 { /* DEVICE=0x1c37 */
147 /* ptimer src frequency in hz */
148 .ptimer_src_freq = 31250000,
149
150 .probe = nvgpu_pci_tegra_probe,
151 .remove = nvgpu_pci_tegra_remove,
152
153 /* power management configuration */
154 .railgate_delay_init = 500,
155 .can_railgate_init = false,
156 .can_elpg_init = true,
157 .enable_elpg = true,
158 .enable_elcg = false,
159 .enable_slcg = true,
160 .enable_blcg = true,
161 .enable_mscg = true,
162 .can_slcg = true,
163 .can_blcg = true,
164 .can_elcg = true,
165
166 .disable_aspm = true,
167
168 /* power management callbacks */
169 .is_railgated = nvgpu_pci_tegra_is_railgated,
170 .clk_round_rate = nvgpu_pci_clk_round_rate,
171
172 .ch_wdt_timeout_ms = 7000,
173
174 .honors_aperture = true,
175 .dma_mask = DMA_BIT_MASK(40),
176 .vbios_min_version = 0x86063000,
177 .hardcode_sw_threshold = true,
178 .ina3221_dcb_index = 0,
179 .ina3221_i2c_address = 0x84,
180 .ina3221_i2c_port = 0x2,
181 },
182 { /* DEVICE=0x1c75 */
183 /* ptimer src frequency in hz */
184 .ptimer_src_freq = 31250000,
185
186 .probe = nvgpu_pci_tegra_probe,
187 .remove = nvgpu_pci_tegra_remove,
188
189 /* power management configuration */
190 .railgate_delay_init = 500,
191 .can_railgate_init = false,
192 .can_elpg_init = true,
193 .enable_elpg = true,
194 .enable_elcg = false,
195 .enable_slcg = true,
196 .enable_blcg = true,
197 .enable_mscg = true,
198 .can_slcg = true,
199 .can_blcg = true,
200 .can_elcg = true,
201
202 .disable_aspm = true,
203
204 /* power management callbacks */
205 .is_railgated = nvgpu_pci_tegra_is_railgated,
206 .clk_round_rate = nvgpu_pci_clk_round_rate,
207
208 .ch_wdt_timeout_ms = 7000,
209
210 .honors_aperture = true,
211 .dma_mask = DMA_BIT_MASK(40),
212 .vbios_min_version = 0x86065300,
213 .hardcode_sw_threshold = false,
214 .ina3221_dcb_index = 1,
215 .ina3221_i2c_address = 0x80,
216 .ina3221_i2c_port = 0x1,
217 },
218 { /* DEVICE=PG503 SKU 201 */
219 /* ptimer src frequency in hz */
220 .ptimer_src_freq = 31250000,
221
222 .probe = nvgpu_pci_tegra_probe,
223 .remove = nvgpu_pci_tegra_remove,
224
225 /* power management configuration */
226 .railgate_delay_init = 500,
227 .can_railgate_init = false,
228 .can_elpg_init = false,
229 .enable_elpg = false,
230 .enable_elcg = false,
231 .enable_slcg = false,
232 .enable_blcg = false,