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-rw-r--r--include/nvgpu/utils.h58
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diff --git a/include/nvgpu/utils.h b/include/nvgpu/utils.h
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1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef NVGPU_UTILS_H
24#define NVGPU_UTILS_H
25
26#include <nvgpu/types.h>
27
28static inline u32 u64_hi32(u64 n)
29{
30 return (u32)((n >> 32) & ~(u32)0);
31}
32
33static inline u32 u64_lo32(u64 n)
34{
35 return (u32)(n & ~(u32)0);
36}
37
38static inline u64 hi32_lo32_to_u64(u32 hi, u32 lo)
39{
40 return (((u64)hi) << 32) | (u64)lo;
41}
42
43static inline u32 set_field(u32 val, u32 mask, u32 field)
44{
45 return ((val & ~mask) | field);
46}
47
48static inline u32 get_field(u32 reg, u32 mask)
49{
50 return (reg & mask);
51}
52
53/*
54 * MISRA Rule 11.6 compliant IP address generator.
55 */
56#define _NVGPU_GET_IP_ ({ __label__ __here; __here: &&__here; })
57
58#endif /* NVGPU_UTILS_H */