diff options
Diffstat (limited to 'include/nvgpu/power_features/cg.h')
-rw-r--r-- | include/nvgpu/power_features/cg.h | 57 |
1 files changed, 0 insertions, 57 deletions
diff --git a/include/nvgpu/power_features/cg.h b/include/nvgpu/power_features/cg.h deleted file mode 100644 index d447d9b..0000000 --- a/include/nvgpu/power_features/cg.h +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | |||
24 | #ifndef NVGPU_POWER_FEATURES_CG_H | ||
25 | #define NVGPU_POWER_FEATURES_CG_H | ||
26 | |||
27 | #include <nvgpu/types.h> | ||
28 | |||
29 | struct gk20a; | ||
30 | struct fifo_gk20a; | ||
31 | |||
32 | void nvgpu_cg_init_gr_load_gating_prod(struct gk20a *g); | ||
33 | void nvgpu_cg_elcg_enable(struct gk20a *g); | ||
34 | void nvgpu_cg_elcg_disable(struct gk20a *g); | ||
35 | void nvgpu_cg_elcg_enable_no_wait(struct gk20a *g); | ||
36 | void nvgpu_cg_elcg_disable_no_wait(struct gk20a *g); | ||
37 | void nvgpu_cg_elcg_set_elcg_enabled(struct gk20a *g, bool enable); | ||
38 | |||
39 | void nvgpu_cg_blcg_mode_enable(struct gk20a *g); | ||
40 | void nvgpu_cg_blcg_mode_disable(struct gk20a *g); | ||
41 | void nvgpu_cg_blcg_fb_ltc_load_enable(struct gk20a *g); | ||
42 | void nvgpu_cg_blcg_fifo_load_enable(struct gk20a *g); | ||
43 | void nvgpu_cg_blcg_pmu_load_enable(struct gk20a *g); | ||
44 | void nvgpu_cg_blcg_ce_load_enable(struct gk20a *g); | ||
45 | void nvgpu_cg_blcg_gr_load_enable(struct gk20a *g); | ||
46 | void nvgpu_cg_blcg_set_blcg_enabled(struct gk20a *g, bool enable); | ||
47 | |||
48 | void nvgpu_cg_slcg_gr_perf_ltc_load_enable(struct gk20a *g); | ||
49 | void nvgpu_cg_slcg_gr_perf_ltc_load_disable(struct gk20a *g); | ||
50 | void nvgpu_cg_slcg_fb_ltc_load_enable(struct gk20a *g); | ||
51 | void nvgpu_cg_slcg_priring_load_enable(struct gk20a *g); | ||
52 | void nvgpu_cg_slcg_fifo_load_enable(struct gk20a *g); | ||
53 | void nvgpu_cg_slcg_pmu_load_enable(struct gk20a *g); | ||
54 | void nvgpu_cg_slcg_ce2_load_enable(struct gk20a *g); | ||
55 | void nvgpu_cg_slcg_set_slcg_enabled(struct gk20a *g, bool enable); | ||
56 | |||
57 | #endif /*NVGPU_POWER_FEATURES_CG_H*/ | ||