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-rw-r--r--include/nvgpu/posix/atomic.h191
-rw-r--r--include/nvgpu/posix/barrier.h44
-rw-r--r--include/nvgpu/posix/bitops.h95
-rw-r--r--include/nvgpu/posix/bug.h56
-rw-r--r--include/nvgpu/posix/circ_buf.h44
-rw-r--r--include/nvgpu/posix/cond.h59
-rw-r--r--include/nvgpu/posix/io.h114
-rw-r--r--include/nvgpu/posix/kmem.h36
-rw-r--r--include/nvgpu/posix/lock.h69
-rw-r--r--include/nvgpu/posix/log2.h37
-rw-r--r--include/nvgpu/posix/nvgpu_mem.h32
-rw-r--r--include/nvgpu/posix/nvlink.h24
-rw-r--r--include/nvgpu/posix/pci.h28
-rw-r--r--include/nvgpu/posix/probe.h31
-rw-r--r--include/nvgpu/posix/rwsem.h35
-rw-r--r--include/nvgpu/posix/sizes.h38
-rw-r--r--include/nvgpu/posix/sort.h35
-rw-r--r--include/nvgpu/posix/thread.h51
-rw-r--r--include/nvgpu/posix/types.h221
-rw-r--r--include/nvgpu/posix/vm.h41
20 files changed, 1281 insertions, 0 deletions
diff --git a/include/nvgpu/posix/atomic.h b/include/nvgpu/posix/atomic.h
new file mode 100644
index 0000000..c9d9212
--- /dev/null
+++ b/include/nvgpu/posix/atomic.h
@@ -0,0 +1,191 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_ATOMIC_H__
24#define __NVGPU_POSIX_ATOMIC_H__
25
26#include <nvgpu/types.h>
27
28/*
29 * Note: this code uses the GCC builtins to implement atomics.
30 */
31
32#define __atomic_cmpxchg(p, v, c) __sync_val_compare_and_swap(p, v, c)
33#define __atomic_and(p, v) __sync_fetch_and_and(p, v)
34#define __atomic_or(p, v) __sync_fetch_and_or(p, v)
35
36#define cmpxchg __atomic_cmpxchg
37
38/*
39 * Place holders until real atomics can be implemented... Yay for GCC builtins!
40 * We can use those eventually to define all the Linux atomic ops.
41 *
42 * TODO: make these _actually_ atomic!
43 */
44typedef struct __nvgpu_posix_atomic {
45 int v;
46} nvgpu_atomic_t;
47
48typedef struct __nvgpu_posix_atomic64 {
49 long v;
50} nvgpu_atomic64_t;
51
52#define __nvgpu_atomic_init(i) { i }
53#define __nvgpu_atomic64_init(i) { i }
54
55static inline void __nvgpu_atomic_set(nvgpu_atomic_t *v, int i)
56{
57 v->v = i;
58}
59
60static inline int __nvgpu_atomic_read(nvgpu_atomic_t *v)
61{
62 return v->v;
63}
64
65static inline void __nvgpu_atomic_inc(nvgpu_atomic_t *v)
66{
67 v->v++;
68}
69
70static inline int __nvgpu_atomic_inc_return(nvgpu_atomic_t *v)
71{
72 v->v++;
73 return v->v;
74}
75
76static inline void __nvgpu_atomic_dec(nvgpu_atomic_t *v)
77{
78 v->v--;
79}
80
81static inline int __nvgpu_atomic_dec_return(nvgpu_atomic_t *v)
82{
83 v->v--;
84 return v->v;
85}
86
87static inline int __nvgpu_atomic_cmpxchg(nvgpu_atomic_t *v, int old, int new)
88{
89 if (v->v == old)
90 v->v = new;
91
92 return v->v;
93}
94
95static inline int __nvgpu_atomic_xchg(nvgpu_atomic_t *v, int new)
96{
97 v->v = new;
98 return new;
99}
100
101static inline bool __nvgpu_atomic_inc_and_test(nvgpu_atomic_t *v)
102{
103 v->v++;
104 return v->v ? true : false;
105}
106
107static inline bool __nvgpu_atomic_dec_and_test(nvgpu_atomic_t *v)
108{
109 v->v--;
110 return v->v ? true : false;
111}
112
113static inline bool __nvgpu_atomic_sub_and_test(int i, nvgpu_atomic_t *v)
114{
115 v->v -= i;
116 return v->v ? true : false;
117}
118
119static inline int __nvgpu_atomic_add_return(int i, nvgpu_atomic_t *v)
120{
121 v->v += i;
122 return v->v;
123}
124
125static inline int __nvgpu_atomic_add_unless(nvgpu_atomic_t *v, int a, int u)
126{
127 if (v->v != u)
128 v->v += a;
129
130 return v->v;
131}
132
133static inline void __nvgpu_atomic64_set(nvgpu_atomic64_t *v, long i)
134{
135 v->v = i;
136}
137
138static inline long __nvgpu_atomic64_read(nvgpu_atomic64_t *v)
139{
140 return v->v;
141}
142
143static inline void __nvgpu_atomic64_add(long x, nvgpu_atomic64_t *v)
144{
145 v->v += x;
146}
147
148static inline void __nvgpu_atomic64_inc(nvgpu_atomic64_t *v)
149{
150 v->v++;
151}
152
153static inline long __nvgpu_atomic64_inc_return(nvgpu_atomic64_t *v)
154{
155 v->v++;
156 return v->v;
157}
158
159static inline void __nvgpu_atomic64_dec(nvgpu_atomic64_t *v)
160{
161 v->v--;
162}
163
164static inline long __nvgpu_atomic64_dec_return(nvgpu_atomic64_t *v)
165{
166 v->v--;
167 return v->v;
168}
169
170static inline long __nvgpu_atomic64_cmpxchg(nvgpu_atomic64_t *v,
171 long old, long new)
172{
173
174 if (v->v == old)
175 v->v = new;
176
177 return v->v;
178}
179
180static inline void __nvgpu_atomic64_sub(long x, nvgpu_atomic64_t *v)
181{
182 v->v -= x;
183}
184
185static inline long __nvgpu_atomic64_sub_return(long x, nvgpu_atomic64_t *v)
186{
187 v->v -= x;
188 return v->v;
189}
190
191#endif
diff --git a/include/nvgpu/posix/barrier.h b/include/nvgpu/posix/barrier.h
new file mode 100644
index 0000000..edc7b12
--- /dev/null
+++ b/include/nvgpu/posix/barrier.h
@@ -0,0 +1,44 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_BARRIER_H__
24#define __NVGPU_POSIX_BARRIER_H__
25
26#define ACCESS_ONCE(x) (*(volatile __typeof__(x) *)&x)
27
28/*
29 * TODO: implement all these!
30 */
31#define __nvgpu_mb()
32#define __nvgpu_rmb()
33#define __nvgpu_wmb()
34
35#define __nvgpu_smp_mb()
36#define __nvgpu_smp_rmb()
37#define __nvgpu_smp_wmb()
38
39#define __nvgpu_read_barrier_depends()
40#define __nvgpu_smp_read_barrier_depends()
41
42#define __NV_ACCESS_ONCE(x) ACCESS_ONCE(x)
43
44#endif
diff --git a/include/nvgpu/posix/bitops.h b/include/nvgpu/posix/bitops.h
new file mode 100644
index 0000000..e8c663b
--- /dev/null
+++ b/include/nvgpu/posix/bitops.h
@@ -0,0 +1,95 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_BITOPS_H__
24#define __NVGPU_POSIX_BITOPS_H__
25
26#include <nvgpu/types.h>
27
28/*
29 * Assume an 8 bit byte, of course.
30 */
31#define BITS_PER_BYTE 8UL
32#define BITS_PER_LONG (__SIZEOF_LONG__ * BITS_PER_BYTE)
33#define BITS_TO_LONGS(bits) \
34 (bits + (BITS_PER_LONG - 1) / BITS_PER_LONG)
35
36/*
37 * Deprecated; use the explicit BITxx() macros instead.
38 */
39#define BIT(i) BIT64(i)
40
41#define GENMASK(h, l) \
42 (((~0UL) - (1UL << (l)) + 1) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
43
44#define DECLARE_BITMAP(bmap, bits) \
45 unsigned long bmap[BITS_TO_LONGS(bits)]
46
47#define for_each_set_bit(bit, addr, size) \
48 for ((bit) = find_first_bit((addr), (size)); \
49 (bit) < (size); \
50 (bit) = find_next_bit((addr), (size), (bit) + 1))
51
52#define ffs(word) __ffs(word)
53#define ffz(word) __ffs(~(word))
54#define fls(word) __fls(word)
55
56/*
57 * Clashes with symbols in libc it seems.
58 */
59#define __ffs(word) __nvgpu_posix_ffs(word)
60#define __fls(word) __nvgpu_posix_fls(word)
61
62unsigned long __nvgpu_posix_ffs(unsigned long word);
63unsigned long __nvgpu_posix_fls(unsigned long word);
64
65unsigned long find_first_bit(const unsigned long *addr, unsigned long size);
66unsigned long find_next_bit(const unsigned long *addr, unsigned long size,
67 unsigned long offset);
68unsigned long find_first_zero_bit(const unsigned long *addr,
69 unsigned long size);
70
71bool test_bit(int nr, const volatile unsigned long *addr);
72bool test_and_set_bit(int nr, volatile unsigned long *addr);
73bool test_and_clear_bit(int nr, volatile unsigned long *addr);
74
75/*
76 * These two are atomic.
77 */
78void set_bit(int nr, volatile unsigned long *addr);
79void clear_bit(int nr, volatile unsigned long *addr);
80
81void bitmap_set(unsigned long *map, unsigned int start, int len);
82void bitmap_clear(unsigned long *map, unsigned int start, int len);
83unsigned long bitmap_find_next_zero_area_off(unsigned long *map,
84 unsigned long size,
85 unsigned long start,
86 unsigned int nr,
87 unsigned long align_mask,
88 unsigned long align_offset);
89unsigned long bitmap_find_next_zero_area(unsigned long *map,
90 unsigned long size,
91 unsigned long start,
92 unsigned int nr,
93 unsigned long align_mask);
94
95#endif
diff --git a/include/nvgpu/posix/bug.h b/include/nvgpu/posix/bug.h
new file mode 100644
index 0000000..04389a9
--- /dev/null
+++ b/include/nvgpu/posix/bug.h
@@ -0,0 +1,56 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_BUG_H__
24#define __NVGPU_POSIX_BUG_H__
25
26#include <nvgpu/types.h>
27
28/*
29 * TODO: make these actually useful!
30 */
31
32#define BUG() __bug("")
33#define BUG_ON(cond) \
34 do { \
35 if (cond) \
36 BUG(); \
37 } while (0)
38
39#define WARN(cond, msg, arg...) __warn(cond, msg, ##arg)
40#define WARN_ON(cond) __warn(cond, "")
41
42#define WARN_ONCE(cond, msg, arg...) \
43 ({static int __warned__ = 0; \
44 if (!__warned__) { \
45 WARN(cond, msg, ##arg); \
46 __warned__ = 1; \
47 } \
48 cond; })
49
50
51void dump_stack(void);
52
53void __bug(const char *fmt, ...) __attribute__ ((noreturn));
54bool __warn(bool cond, const char *fmt, ...);
55
56#endif
diff --git a/include/nvgpu/posix/circ_buf.h b/include/nvgpu/posix/circ_buf.h
new file mode 100644
index 0000000..8d9b5ea
--- /dev/null
+++ b/include/nvgpu/posix/circ_buf.h
@@ -0,0 +1,44 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_CIRC_BUF_H__
24#define __NVGPU_POSIX_CIRC_BUF_H__
25
26#include <nvgpu/bug.h>
27
28/* TODO: implement. */
29
30#define CIRC_CNT(head, tail, size) \
31 ({(void)head; \
32 (void)tail; \
33 (void)size; \
34 BUG(); \
35 1; })
36
37#define CIRC_SPACE(head, tail, size) \
38 ({(void)head; \
39 (void)tail; \
40 (void)size; \
41 BUG(); \
42 1; })
43
44#endif
diff --git a/include/nvgpu/posix/cond.h b/include/nvgpu/posix/cond.h
new file mode 100644
index 0000000..3528388
--- /dev/null
+++ b/include/nvgpu/posix/cond.h
@@ -0,0 +1,59 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_COND_H__
24#define __NVGPU_POSIX_COND_H__
25
26#include <nvgpu/bug.h>
27
28struct nvgpu_cond {
29 /* Place holder until this can be properly implemented. */
30};
31
32/**
33 * NVGPU_COND_WAIT - Wait for a condition to be true
34 *
35 * @c - The condition variable to sleep on
36 * @condition - The condition that needs to be true
37 * @timeout_ms - Timeout in milliseconds, or 0 for infinite wait
38 *
39 * Wait for a condition to become true. Returns -ETIMEOUT if
40 * the wait timed out with condition false.
41 */
42#define NVGPU_COND_WAIT(c, condition, timeout_ms) \
43 ({BUG(); 1; })
44
45/**
46 * NVGPU_COND_WAIT_INTERRUPTIBLE - Wait for a condition to be true
47 *
48 * @c - The condition variable to sleep on
49 * @condition - The condition that needs to be true
50 * @timeout_ms - Timeout in milliseconds, or 0 for infinite wait
51 *
52 * Wait for a condition to become true. Returns -ETIMEOUT if
53 * the wait timed out with condition false or -ERESTARTSYS on
54 * signal.
55 */
56#define NVGPU_COND_WAIT_INTERRUPTIBLE(c, condition, timeout_ms) \
57 ({BUG(); 1; })
58
59#endif
diff --git a/include/nvgpu/posix/io.h b/include/nvgpu/posix/io.h
new file mode 100644
index 0000000..98be4d0
--- /dev/null
+++ b/include/nvgpu/posix/io.h
@@ -0,0 +1,114 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef NVGPU_POSIX_IO_H
24#define NVGPU_POSIX_IO_H
25
26#include <nvgpu/types.h>
27#include <nvgpu/list.h>
28
29struct gk20a;
30
31/**
32 * Here lies the interface for a unit test module to interact with the nvgpu IO
33 * accessors. This interface provides the ability for a module to react to nvgpu
34 * calling nvgpu IO accessors so that nvgpu can handle various HW sequences even
35 * when run in unit testing mode.
36 *
37 * The primary interface is simply callbacks to the unit test module which the
38 * module can handle how ever it wishes.
39 */
40
41struct nvgpu_reg_access {
42 /*
43 * Address of the register write relative to the base of the register
44 * space. I.e you can compare this against values in the HW headers
45 * directly to check what register is being read/written to/from.
46 */
47 u32 addr;
48
49 /*
50 * Writes: this is the value being written.
51 * Reads: populate with the value to return.
52 */
53 u32 value;
54};
55
56struct nvgpu_posix_io_callbacks {
57 void (*writel)(struct gk20a *g, struct nvgpu_reg_access *access);
58 void (*writel_check)(struct gk20a *g, struct nvgpu_reg_access *access);
59 void (*__readl)(struct gk20a *g, struct nvgpu_reg_access *access);
60 void (*readl)(struct gk20a *g, struct nvgpu_reg_access *access);
61 void (*bar1_writel)(struct gk20a *g, struct nvgpu_reg_access *access);
62 void (*bar1_readl)(struct gk20a *g, struct nvgpu_reg_access *access);
63 void (*usermode_writel)(struct gk20a *g,
64 struct nvgpu_reg_access *access);
65};
66
67struct nvgpu_posix_io_callbacks *nvgpu_posix_register_io(
68 struct gk20a *g,
69 struct nvgpu_posix_io_callbacks *io_callbacks);
70
71struct nvgpu_posix_io_reg_space {
72 u32 base;
73 u32 size;
74 u32 *data;
75 struct nvgpu_list_node link;
76};
77
78static inline struct nvgpu_posix_io_reg_space *
79nvgpu_posix_io_reg_space_from_link(struct nvgpu_list_node *node)
80{
81 return (struct nvgpu_posix_io_reg_space *)
82 ((uintptr_t)node - offsetof(struct nvgpu_posix_io_reg_space, link));
83};
84
85void nvgpu_posix_io_init_reg_space(struct gk20a *g);
86int nvgpu_posix_io_get_error_code(struct gk20a *g);
87void nvgpu_posix_io_reset_error_code(struct gk20a *g);
88int nvgpu_posix_io_add_reg_space(struct gk20a *g, u32 base, u32 size);
89struct nvgpu_posix_io_reg_space *nvgpu_posix_io_get_reg_space(struct gk20a *g,
90 u32 addr);
91void nvgpu_posix_io_delete_reg_space(struct gk20a *g, u32 base);
92void nvgpu_posix_io_writel_reg_space(struct gk20a *g, u32 addr, u32 data);
93u32 nvgpu_posix_io_readl_reg_space(struct gk20a *g, u32 addr);
94
95struct nvgpu_posix_io_reg_access {
96 struct nvgpu_reg_access access;
97 struct nvgpu_list_node link;
98};
99
100static inline struct nvgpu_posix_io_reg_access *
101nvgpu_posix_io_reg_access_from_link(struct nvgpu_list_node *node)
102{
103 return (struct nvgpu_posix_io_reg_access *)
104 ((uintptr_t)node - offsetof(struct nvgpu_posix_io_reg_access, link));
105};
106
107void nvgpu_posix_io_start_recorder(struct gk20a *g);
108void nvgpu_posix_io_reset_recorder(struct gk20a *g);
109void nvgpu_posix_io_record_access(struct gk20a *g,
110 struct nvgpu_reg_access *access);
111bool nvgpu_posix_io_check_sequence(struct gk20a *g,
112 struct nvgpu_reg_access *sequence, u32 size, bool strict);
113
114#endif
diff --git a/include/nvgpu/posix/kmem.h b/include/nvgpu/posix/kmem.h
new file mode 100644
index 0000000..efcdd3d
--- /dev/null
+++ b/include/nvgpu/posix/kmem.h
@@ -0,0 +1,36 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_KMEM_H__
24#define __NVGPU_POSIX_KMEM_H__
25
26#include <nvgpu/types.h>
27
28void *__nvgpu_kmalloc(struct gk20a *g, size_t size, void *ip);
29void *__nvgpu_kzalloc(struct gk20a *g, size_t size, void *ip);
30void *__nvgpu_kcalloc(struct gk20a *g, size_t n, size_t size, void *ip);
31void *__nvgpu_vmalloc(struct gk20a *g, unsigned long size, void *ip);
32void *__nvgpu_vzalloc(struct gk20a *g, unsigned long size, void *ip);
33void __nvgpu_kfree(struct gk20a *g, void *addr);
34void __nvgpu_vfree(struct gk20a *g, void *addr);
35
36#endif
diff --git a/include/nvgpu/posix/lock.h b/include/nvgpu/posix/lock.h
new file mode 100644
index 0000000..82eddd0
--- /dev/null
+++ b/include/nvgpu/posix/lock.h
@@ -0,0 +1,69 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_LOCK_H__
24#define __NVGPU_POSIX_LOCK_H__
25
26#include <stdlib.h>
27
28#include <pthread.h>
29
30/*
31 * All locks for posix nvgpu are just pthread locks. There's not a lot of reason
32 * to have real spinlocks in userspace since we aren't using real HW or running
33 * perf critical code where a sleep could be devestating.
34 *
35 * This could be revisited later, though.
36 */
37struct __nvgpu_posix_lock {
38 pthread_mutex_t mutex;
39};
40
41static inline void __nvgpu_posix_lock_acquire(struct __nvgpu_posix_lock *lock)
42{
43 pthread_mutex_lock(&lock->mutex);
44}
45
46static inline int __nvgpu_posix_lock_try_acquire(
47 struct __nvgpu_posix_lock *lock)
48{
49 return pthread_mutex_trylock(&lock->mutex);
50}
51
52static inline void __nvgpu_posix_lock_release(struct __nvgpu_posix_lock *lock)
53{
54 pthread_mutex_unlock(&lock->mutex);
55}
56
57struct nvgpu_mutex {
58 struct __nvgpu_posix_lock lock;
59};
60
61struct nvgpu_spinlock {
62 struct __nvgpu_posix_lock lock;
63};
64
65struct nvgpu_raw_spinlock {
66 struct __nvgpu_posix_lock lock;
67};
68
69#endif /* NVGPU_LOCK_LINUX_H */
diff --git a/include/nvgpu/posix/log2.h b/include/nvgpu/posix/log2.h
new file mode 100644
index 0000000..ca95c10
--- /dev/null
+++ b/include/nvgpu/posix/log2.h
@@ -0,0 +1,37 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_LOG2_H__
24#define __NVGPU_POSIX_LOG2_H__
25
26#define ilog2(x) (fls(x) - 1)
27
28#define roundup_pow_of_two(x) (1UL << fls((x) - 1))
29#define rounddown_pow_of_two(x) (1UL << (fls(x) - 1))
30
31#define is_power_of_2(x) \
32 ({ \
33 typeof(x) __x__ = (x); \
34 (__x__ != 0 && ((__x__ & (__x__ - 1)) == 0)); \
35 })
36
37#endif
diff --git a/include/nvgpu/posix/nvgpu_mem.h b/include/nvgpu/posix/nvgpu_mem.h
new file mode 100644
index 0000000..30cdf60
--- /dev/null
+++ b/include/nvgpu/posix/nvgpu_mem.h
@@ -0,0 +1,32 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_NVGPU_MEM_H__
24#define __NVGPU_POSIX_NVGPU_MEM_H__
25
26struct nvgpu_mem_priv {
27 /*
28 * Eventually this will require an implementation using nvmap.
29 */
30};
31
32#endif
diff --git a/include/nvgpu/posix/nvlink.h b/include/nvgpu/posix/nvlink.h
new file mode 100644
index 0000000..99cf837
--- /dev/null
+++ b/include/nvgpu/posix/nvlink.h
@@ -0,0 +1,24 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef __NVGPU_POSIX_NVLINK_H__
18#define __NVGPU_POSIX_NVLINK_H__
19
20/*
21 * Empty...
22 */
23
24#endif
diff --git a/include/nvgpu/posix/pci.h b/include/nvgpu/posix/pci.h
new file mode 100644
index 0000000..cd9fc14
--- /dev/null
+++ b/include/nvgpu/posix/pci.h
@@ -0,0 +1,28 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_PCI_H__
24#define __NVGPU_POSIX_PCI_H__
25
26#define PCI_VENDOR_ID_NVIDIA 0x10de
27
28#endif
diff --git a/include/nvgpu/posix/probe.h b/include/nvgpu/posix/probe.h
new file mode 100644
index 0000000..a9763aa
--- /dev/null
+++ b/include/nvgpu/posix/probe.h
@@ -0,0 +1,31 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_PROBE_H__
24#define __NVGPU_POSIX_PROBE_H__
25
26struct gk20a;
27
28struct gk20a *nvgpu_posix_probe(void);
29void nvgpu_posix_cleanup(struct gk20a *g);
30
31#endif
diff --git a/include/nvgpu/posix/rwsem.h b/include/nvgpu/posix/rwsem.h
new file mode 100644
index 0000000..65aa931
--- /dev/null
+++ b/include/nvgpu/posix/rwsem.h
@@ -0,0 +1,35 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_RWSEM_H__
24#define __NVGPU_POSIX_RWSEM_H__
25
26#include <nvgpu/lock.h>
27
28struct nvgpu_rwsem {
29 struct nvgpu_spinlock lock;
30
31 int readers;
32 int writers;
33};
34
35#endif
diff --git a/include/nvgpu/posix/sizes.h b/include/nvgpu/posix/sizes.h
new file mode 100644
index 0000000..3fda757
--- /dev/null
+++ b/include/nvgpu/posix/sizes.h
@@ -0,0 +1,38 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_SIZES_H__
24#define __NVGPU_POSIX_SIZES_H__
25
26#define SZ_1K (1UL << 10)
27#define SZ_4K (SZ_1K << 2)
28#define SZ_64K (SZ_1K << 6)
29#define SZ_128K (SZ_1K << 7)
30
31#define SZ_1M (1UL << 20)
32#define SZ_16M (SZ_1M << 4)
33#define SZ_256M (SZ_1M << 8)
34
35#define SZ_1G (1UL << 30)
36#define SZ_4G (SZ_1G << 2)
37
38#endif
diff --git a/include/nvgpu/posix/sort.h b/include/nvgpu/posix/sort.h
new file mode 100644
index 0000000..6a6920e
--- /dev/null
+++ b/include/nvgpu/posix/sort.h
@@ -0,0 +1,35 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_SORT_H__
24#define __NVGPU_POSIX_SORT_H__
25
26#include <nvgpu/bug.h>
27
28static void sort(void *base, size_t num, size_t size,
29 int (*cmp)(const void *, const void *),
30 void (*swap)(void *, void *, int))
31{
32 __bug("sort() not implemented yet!");
33}
34
35#endif
diff --git a/include/nvgpu/posix/thread.h b/include/nvgpu/posix/thread.h
new file mode 100644
index 0000000..a312cc1
--- /dev/null
+++ b/include/nvgpu/posix/thread.h
@@ -0,0 +1,51 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_THREAD_H__
24#define __NVGPU_POSIX_THREAD_H__
25
26#include <pthread.h>
27
28#include <nvgpu/types.h>
29
30/*
31 * Handles passing an nvgpu thread function into a posix thread.
32 */
33struct nvgpu_posix_thread_data {
34 int (*fn)(void *data);
35 void *data;
36};
37
38/*
39 * For some reason POSIX only allows 16 bytes of name length.
40 */
41#define NVGPU_THREAD_POSIX_MAX_NAMELEN 16
42
43struct nvgpu_thread {
44 bool running;
45 bool should_stop;
46 pthread_t thread;
47 struct nvgpu_posix_thread_data nvgpu;
48 char tname[16];
49};
50
51#endif
diff --git a/include/nvgpu/posix/types.h b/include/nvgpu/posix/types.h
new file mode 100644
index 0000000..12078b9
--- /dev/null
+++ b/include/nvgpu/posix/types.h
@@ -0,0 +1,221 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_TYPES_H__
24#define __NVGPU_POSIX_TYPES_H__
25
26#include <stdbool.h>
27#include <stdint.h>
28#include <stddef.h>
29#include <errno.h>
30#include <limits.h>
31#include <string.h>
32#include <strings.h>
33#include <stdio.h>
34#include <stdarg.h>
35
36/*
37 * For endianness functions.
38 */
39#include <netinet/in.h>
40
41typedef unsigned char u8;
42typedef unsigned short u16;
43typedef unsigned int u32;
44typedef unsigned long long u64;
45
46typedef signed char s8;
47typedef signed short s16;
48typedef signed int s32;
49typedef signed long long s64;
50
51#define min_t(type, a, b) \
52 ({ \
53 type __a = (a); \
54 type __b = (b); \
55 __a < __b ? __a : __b; \
56 })
57
58#if defined(min)
59#undef min
60#endif
61#if defined(max)
62#undef max
63#endif
64
65#define min(a, b) \
66 ({ \
67 (a) < (b) ? a : b; \
68 })
69#define max(a, b) \
70 ({ \
71 (a) > (b) ? a : b; \
72 })
73#define min3(a, b, c) min(min(a, b), c)
74
75#define PAGE_SIZE 4096U
76
77#define ARRAY_SIZE(array) \
78 (sizeof(array) / sizeof((array)[0]))
79
80#define MAX_SCHEDULE_TIMEOUT LONG_MAX
81
82#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
83
84/*
85 * Only used in clk_gm20b.c which we will never unit test. Don't use!
86 */
87#define DIV_ROUND_CLOSEST(x, divisor) ({BUG(); 0; })
88
89/*
90 * Joys of userspace: usually division just works since the compiler can link
91 * against external division functions implicitly.
92 */
93#define do_div(a, b) ((a) /= (b))
94#define div64_u64(a, b) ((a) / (b))
95
96#define __round_mask(x, y) ((__typeof__(x))((y) - 1))
97#define round_up(x, y) ((((x) - 1) | __round_mask(x, y)) + 1)
98#define roundup(x, y) round_up(x, y)
99#define round_down(x, y) ((x) & ~__round_mask(x, y))
100
101#define ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask))
102#define ALIGN(x, a) ALIGN_MASK(x, (typeof(x))(a) - 1)
103#define PAGE_ALIGN(x) ALIGN(x, PAGE_SIZE)
104
105/*
106 * Caps return at the size of the buffer not what would have been written if buf
107 * were arbitrarily sized.
108 */
109static inline int scnprintf(char *buf, size_t size, const char *format, ...)
110{
111 size_t ret;
112 va_list args;
113
114 va_start(args, format);
115 ret = vsnprintf(buf, size, format, args);
116 va_end(args);
117
118 return ret <= size ? ret : size;
119}
120
121static inline u32 be32_to_cpu(u32 x)
122{
123 /*
124 * Conveniently big-endian happens to be network byte order as well so
125 * we can use ntohl() for this.
126 */
127 return ntohl(x);
128}
129
130/*
131 * Hamming weights.
132 */
133static inline unsigned long __hweight8(uint8_t x)
134{
135 return (unsigned long)(!!(x & (1 << 0)) +
136 !!(x & (1 << 1)) +
137 !!(x & (1 << 2)) +
138 !!(x & (1 << 3)) +
139 !!(x & (1 << 4)) +
140 !!(x & (1 << 5)) +
141 !!(x & (1 << 6)) +
142 !!(x & (1 << 7)));
143}
144
145static inline unsigned long __hweight16(uint16_t x)
146{
147 return __hweight8((uint8_t)x) +
148 __hweight8((uint8_t)((x & 0xff00) >> 8));
149}
150
151static inline unsigned long __hweight32(uint32_t x)
152{
153 return __hweight16((uint16_t)x) +
154 __hweight16((uint16_t)((x & 0xffff0000) >> 16));
155}
156
157static inline unsigned long __hweight64(uint64_t x)
158{
159 return __hweight32((uint32_t)x) +
160 __hweight32((uint32_t)((x & 0xffffffff00000000) >> 32));
161}
162
163#define hweight32 __hweight32
164#define hweight_long __hweight64
165
166/*
167 * Better suited under a compiler.h type header file, but for now these can live
168 * here.
169 */
170#define __must_check
171#define __maybe_unused __attribute__((unused))
172#define __iomem
173#define __user
174#define unlikely
175#define likely
176
177#define __stringify(x) #x
178
179/*
180 * Prevent compiler optimizations from mangling writes. But likely most uses of
181 * this in nvgpu are incorrect (i.e unnecessary).
182 */
183#define WRITE_ONCE(p, v) \
184 ({ \
185 volatile typeof(p) *__p__ = &(p); \
186 *__p__ = v; \
187 })
188
189#define container_of(ptr, type, member) ({ \
190 const typeof( ((type *)0)->member ) *__mptr = (ptr); \
191 (type *)( (char *)__mptr - offsetof(type,member) );})
192
193#define __packed __attribute__((packed))
194
195#define IS_ENABLED(config) 0
196
197#define MAX_ERRNO 4095
198
199#define IS_ERR_VALUE(x) ((x) >= (unsigned long)-MAX_ERRNO)
200
201static inline void *ERR_PTR(long error)
202{
203 return (void *) error;
204}
205
206static inline long PTR_ERR(void *error)
207{
208 return (long)(uintptr_t)error;
209}
210
211static inline bool IS_ERR(const void *ptr)
212{
213 return IS_ERR_VALUE((unsigned long)ptr);
214}
215
216static inline bool IS_ERR_OR_NULL(const void *ptr)
217{
218 return (ptr == NULL) || IS_ERR_VALUE((unsigned long)ptr);
219}
220
221#endif
diff --git a/include/nvgpu/posix/vm.h b/include/nvgpu/posix/vm.h
new file mode 100644
index 0000000..ae997d3
--- /dev/null
+++ b/include/nvgpu/posix/vm.h
@@ -0,0 +1,41 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_POSIX_VM_H__
24#define __NVGPU_POSIX_VM_H__
25
26#include <nvgpu/types.h>
27
28struct nvgpu_os_buffer {
29 /*
30 * We just use malloc() buffers in userspace.
31 */
32 void *buf;
33 size_t size;
34};
35
36struct nvgpu_mapped_buf_priv {
37 void *buf;
38 size_t size;
39};
40
41#endif
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