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-rw-r--r--include/nvgpu/linux/vm.h92
1 files changed, 0 insertions, 92 deletions
diff --git a/include/nvgpu/linux/vm.h b/include/nvgpu/linux/vm.h
deleted file mode 100644
index 6f3beaa..0000000
--- a/include/nvgpu/linux/vm.h
+++ /dev/null
@@ -1,92 +0,0 @@
1/*
2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef __COMMON_LINUX_VM_PRIV_H__
18#define __COMMON_LINUX_VM_PRIV_H__
19
20#include <nvgpu/types.h>
21
22#include <asm/cacheflush.h>
23
24/*
25 * Couple of places explicitly flush caches still. Any DMA buffer we allocate
26 * from within the GPU is writecombine and as a result does not need this but
27 * there seem to be exceptions.
28 */
29#ifdef CONFIG_ARM64
30#define outer_flush_range(a, b)
31#define __cpuc_flush_dcache_area __flush_dcache_area
32#endif
33
34struct sg_table;
35struct dma_buf;
36struct device;
37
38struct vm_gk20a;
39struct vm_gk20a_mapping_batch;
40struct nvgpu_vm_area;
41
42struct nvgpu_os_buffer {
43 struct dma_buf *dmabuf;
44 struct dma_buf_attachment *attachment;
45 struct device *dev;
46};
47
48struct nvgpu_mapped_buf_priv {
49 struct dma_buf *dmabuf;
50 struct dma_buf_attachment *attachment;
51 struct sg_table *sgt;
52};
53
54/* NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL must be set */
55int nvgpu_vm_map_linux(struct vm_gk20a *vm,
56 struct dma_buf *dmabuf,
57 u64 map_addr,
58 u32 flags,
59 u32 page_size,
60 s16 compr_kind,
61 s16 incompr_kind,
62 int rw_flag,
63 u64 buffer_offset,
64 u64 mapping_size,
65 struct vm_gk20a_mapping_batch *mapping_batch,
66 u64 *gpu_va);
67
68/*
69 * Notes:
70 * - Batch may be NULL if map op is not part of a batch.
71 * - NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL must be set
72 */
73int nvgpu_vm_map_buffer(struct vm_gk20a *vm,
74 int dmabuf_fd,
75 u64 *map_addr,
76 u32 flags, /* NVGPU_AS_MAP_BUFFER_FLAGS_ */
77 u32 page_size,
78 s16 compr_kind,
79 s16 incompr_kind,
80 u64 buffer_offset,
81 u64 mapping_size,
82 struct vm_gk20a_mapping_batch *batch);
83
84/* find buffer corresponding to va */
85int nvgpu_vm_find_buf(struct vm_gk20a *vm, u64 gpu_va,
86 struct dma_buf **dmabuf,
87 u64 *offset);
88
89enum nvgpu_aperture gk20a_dmabuf_aperture(struct gk20a *g,
90 struct dma_buf *dmabuf);
91
92#endif