diff options
Diffstat (limited to 'include/nvgpu/acr/acr_objflcn.h')
| -rw-r--r-- | include/nvgpu/acr/acr_objflcn.h | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/include/nvgpu/acr/acr_objflcn.h b/include/nvgpu/acr/acr_objflcn.h new file mode 100644 index 0000000..57b43c8 --- /dev/null +++ b/include/nvgpu/acr/acr_objflcn.h | |||
| @@ -0,0 +1,91 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. | ||
| 3 | * | ||
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
| 5 | * copy of this software and associated documentation files (the "Software"), | ||
| 6 | * to deal in the Software without restriction, including without limitation | ||
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
| 8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
| 9 | * Software is furnished to do so, subject to the following conditions: | ||
| 10 | * | ||
| 11 | * The above copyright notice and this permission notice shall be included in | ||
| 12 | * all copies or substantial portions of the Software. | ||
| 13 | * | ||
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
| 17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
| 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
| 19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
| 20 | * DEALINGS IN THE SOFTWARE. | ||
| 21 | */ | ||
| 22 | #ifndef NVGPU_ACR_OBJFLCN_H | ||
| 23 | #define NVGPU_ACR_OBJFLCN_H | ||
| 24 | |||
| 25 | #ifndef NVGPU_ACR_H | ||
| 26 | #warning "acr_objflcn.h not included from nvgpu_acr.h!" \ | ||
| 27 | "Include nvgpu_acr.h instead of acr_xxx.h to get access to ACR interfaces" | ||
| 28 | #endif | ||
| 29 | |||
| 30 | struct flcn_ucode_img { | ||
| 31 | u32 *header; /* only some falcons have header */ | ||
| 32 | u32 *data; | ||
| 33 | struct pmu_ucode_desc *desc; /* only some falcons have descriptor */ | ||
| 34 | u32 data_size; | ||
| 35 | void *fw_ver; /* CTRL_GPU_GET_FIRMWARE_VERSION_PARAMS struct */ | ||
| 36 | u8 load_entire_os_data; /* load the whole osData section at boot time.*/ | ||
| 37 | /* NULL if not a light secure falcon.*/ | ||
| 38 | struct lsf_ucode_desc *lsf_desc; | ||
| 39 | /* True if there a resources to freed by the client. */ | ||
| 40 | u8 free_res_allocs; | ||
| 41 | u32 flcn_inst; | ||
| 42 | }; | ||
| 43 | |||
| 44 | struct flcn_ucode_img_v1 { | ||
| 45 | u32 *header; | ||
| 46 | u32 *data; | ||
| 47 | struct pmu_ucode_desc_v1 *desc; | ||
| 48 | u32 data_size; | ||
| 49 | void *fw_ver; | ||
| 50 | u8 load_entire_os_data; | ||
| 51 | struct lsf_ucode_desc_v1 *lsf_desc; | ||
| 52 | u8 free_res_allocs; | ||
| 53 | u32 flcn_inst; | ||
| 54 | }; | ||
| 55 | |||
| 56 | /* | ||
| 57 | * Falcon UCODE header index. | ||
| 58 | */ | ||
| 59 | #define FLCN_NL_UCODE_HDR_OS_CODE_OFF_IND (0) | ||
| 60 | #define FLCN_NL_UCODE_HDR_OS_CODE_SIZE_IND (1) | ||
| 61 | #define FLCN_NL_UCODE_HDR_OS_DATA_OFF_IND (2) | ||
| 62 | #define FLCN_NL_UCODE_HDR_OS_DATA_SIZE_IND (3) | ||
| 63 | #define FLCN_NL_UCODE_HDR_NUM_APPS_IND (4) | ||
| 64 | |||
| 65 | /* | ||
| 66 | * There are total N number of Apps with code and offset defined in UCODE header | ||
| 67 | * This macro provides the CODE and DATA offset and size of Ath application. | ||
| 68 | */ | ||
| 69 | #define FLCN_NL_UCODE_HDR_APP_CODE_START_IND (5) | ||
| 70 | #define FLCN_NL_UCODE_HDR_APP_CODE_OFF_IND(N, A) \ | ||
| 71 | (FLCN_NL_UCODE_HDR_APP_CODE_START_IND + (A*2)) | ||
| 72 | #define FLCN_NL_UCODE_HDR_APP_CODE_SIZE_IND(N, A) \ | ||
| 73 | (FLCN_NL_UCODE_HDR_APP_CODE_START_IND + (A*2) + 1) | ||
| 74 | #define FLCN_NL_UCODE_HDR_APP_CODE_END_IND(N) \ | ||
| 75 | (FLCN_NL_UCODE_HDR_APP_CODE_START_IND + (N*2) - 1) | ||
| 76 | |||
| 77 | #define FLCN_NL_UCODE_HDR_APP_DATA_START_IND(N) \ | ||
| 78 | (FLCN_NL_UCODE_HDR_APP_CODE_END_IND(N) + 1) | ||
| 79 | #define FLCN_NL_UCODE_HDR_APP_DATA_OFF_IND(N, A) \ | ||
| 80 | (FLCN_NL_UCODE_HDR_APP_DATA_START_IND(N) + (A*2)) | ||
| 81 | #define FLCN_NL_UCODE_HDR_APP_DATA_SIZE_IND(N, A) \ | ||
| 82 | (FLCN_NL_UCODE_HDR_APP_DATA_START_IND(N) + (A*2) + 1) | ||
| 83 | #define FLCN_NL_UCODE_HDR_APP_DATA_END_IND(N) \ | ||
| 84 | (FLCN_NL_UCODE_HDR_APP_DATA_START_IND(N) + (N*2) - 1) | ||
| 85 | |||
| 86 | #define FLCN_NL_UCODE_HDR_OS_OVL_OFF_IND(N) \ | ||
| 87 | (FLCN_NL_UCODE_HDR_APP_DATA_END_IND(N) + 1) | ||
| 88 | #define FLCN_NL_UCODE_HDR_OS_OVL_SIZE_IND(N) \ | ||
| 89 | (FLCN_NL_UCODE_HDR_APP_DATA_END_IND(N) + 2) | ||
| 90 | |||
| 91 | #endif /* NVGPU_ACR_OBJFLCN_H */ | ||
