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-rw-r--r--include/gk20a/hw_pbdma_gk20a.h575
1 files changed, 0 insertions, 575 deletions
diff --git a/include/gk20a/hw_pbdma_gk20a.h b/include/gk20a/hw_pbdma_gk20a.h
deleted file mode 100644
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--- a/include/gk20a/hw_pbdma_gk20a.h
+++ /dev/null
@@ -1,575 +0,0 @@
1/*
2 * Copyright (c) 2012-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22/*
23 * Function naming determines intended use:
24 *
25 * <x>_r(void) : Returns the offset for register <x>.
26 *
27 * <x>_o(void) : Returns the offset for element <x>.
28 *
29 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
30 *
31 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
32 *
33 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
34 * and masked to place it at field <y> of register <x>. This value
35 * can be |'d with others to produce a full register value for
36 * register <x>.
37 *
38 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
39 * value can be ~'d and then &'d to clear the value of field <y> for
40 * register <x>.
41 *
42 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
43 * to place it at field <y> of register <x>. This value can be |'d
44 * with others to produce a full register value for <x>.
45 *
46 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
47 * <x> value 'r' after being shifted to place its LSB at bit 0.
48 * This value is suitable for direct comparison with other unshifted
49 * values appropriate for use in field <y> of register <x>.
50 *
51 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
52 * field <y> of register <x>. This value is suitable for direct
53 * comparison with unshifted values appropriate for use in field <y>
54 * of register <x>.
55 */
56#ifndef _hw_pbdma_gk20a_h_
57#define _hw_pbdma_gk20a_h_
58
59static inline u32 pbdma_gp_entry1_r(void)
60{
61 return 0x10000004U;
62}
63static inline u32 pbdma_gp_entry1_get_hi_v(u32 r)
64{
65 return (r >> 0U) & 0xffU;
66}
67static inline u32 pbdma_gp_entry1_length_f(u32 v)
68{
69 return (v & 0x1fffffU) << 10U;
70}
71static inline u32 pbdma_gp_entry1_length_v(u32 r)
72{
73 return (r >> 10U) & 0x1fffffU;
74}
75static inline u32 pbdma_gp_base_r(u32 i)
76{
77 return 0x00040048U + i*8192U;
78}
79static inline u32 pbdma_gp_base__size_1_v(void)
80{
81 return 0x00000001U;
82}
83static inline u32 pbdma_gp_base_offset_f(u32 v)
84{
85 return (v & 0x1fffffffU) << 3U;
86}
87static inline u32 pbdma_gp_base_rsvd_s(void)
88{
89 return 3U;
90}
91static inline u32 pbdma_gp_base_hi_r(u32 i)
92{
93 return 0x0004004cU + i*8192U;
94}
95static inline u32 pbdma_gp_base_hi_offset_f(u32 v)
96{
97 return (v & 0xffU) << 0U;
98}
99static inline u32 pbdma_gp_base_hi_limit2_f(u32 v)
100{
101 return (v & 0x1fU) << 16U;
102}
103static inline u32 pbdma_gp_fetch_r(u32 i)
104{
105 return 0x00040050U + i*8192U;
106}
107static inline u32 pbdma_gp_get_r(u32 i)
108{
109 return 0x00040014U + i*8192U;
110}
111static inline u32 pbdma_gp_put_r(u32 i)
112{
113 return 0x00040000U + i*8192U;
114}
115static inline u32 pbdma_timeout_r(u32 i)
116{
117 return 0x0004012cU + i*8192U;
118}
119static inline u32 pbdma_timeout__size_1_v(void)
120{
121 return 0x00000001U;
122}
123static inline u32 pbdma_timeout_period_m(void)
124{
125 return 0xffffffffU << 0U;
126}
127static inline u32 pbdma_timeout_period_max_f(void)
128{
129 return 0xffffffffU;
130}
131static inline u32 pbdma_pb_fetch_r(u32 i)
132{
133 return 0x00040054U + i*8192U;
134}
135static inline u32 pbdma_pb_fetch_hi_r(u32 i)
136{
137 return 0x00040058U + i*8192U;
138}
139static inline u32 pbdma_get_r(u32 i)
140{
141 return 0x00040018U + i*8192U;
142}
143static inline u32 pbdma_get_hi_r(u32 i)
144{
145 return 0x0004001cU + i*8192U;
146}
147static inline u32 pbdma_put_r(u32 i)
148{
149 return 0x0004005cU + i*8192U;
150}
151static inline u32 pbdma_put_hi_r(u32 i)
152{
153 return 0x00040060U + i*8192U;
154}
155static inline u32 pbdma_formats_r(u32 i)
156{
157 return 0x0004009cU + i*8192U;
158}
159static inline u32 pbdma_formats_gp_fermi0_f(void)
160{
161 return 0x0U;
162}
163static inline u32 pbdma_formats_pb_fermi1_f(void)
164{
165 return 0x100U;
166}
167static inline u32 pbdma_formats_mp_fermi0_f(void)
168{
169 return 0x0U;
170}
171static inline u32 pbdma_pb_header_r(u32 i)
172{
173 return 0x00040084U + i*8192U;
174}
175static inline u32 pbdma_pb_header_priv_user_f(void)
176{
177 return 0x0U;
178}
179static inline u32 pbdma_pb_header_method_zero_f(void)
180{
181 return 0x0U;
182}
183static inline u32 pbdma_pb_header_subchannel_zero_f(void)
184{
185 return 0x0U;
186}
187static inline u32 pbdma_pb_header_level_main_f(void)
188{
189 return 0x0U;
190}
191static inline u32 pbdma_pb_header_first_true_f(void)
192{
193 return 0x400000U;
194}
195static inline u32 pbdma_pb_header_type_inc_f(void)
196{
197 return 0x20000000U;
198}
199static inline u32 pbdma_pb_header_type_non_inc_f(void)
200{
201 return 0x60000000U;
202}
203static inline u32 pbdma_hdr_shadow_r(u32 i)
204{
205 return 0x00040118U + i*8192U;
206}
207static inline u32 pbdma_gp_shadow_0_r(u32 i)
208{
209 return 0x00040110U + i*8192U;
210}
211static inline u32 pbdma_gp_shadow_1_r(u32 i)
212{
213 return 0x00040114U + i*8192U;
214}
215static inline u32 pbdma_subdevice_r(u32 i)
216{
217 return 0x00040094U + i*8192U;
218}
219static inline u32 pbdma_subdevice_id_f(u32 v)
220{
221 return (v & 0xfffU) << 0U;
222}
223static inline u32 pbdma_subdevice_status_active_f(void)
224{
225