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-rw-r--r--device_info_procfs.c10
-rw-r--r--nvdebug.h10
-rw-r--r--nvdebug_entry.c7
3 files changed, 15 insertions, 12 deletions
diff --git a/device_info_procfs.c b/device_info_procfs.c
index c8903fc..ce5843f 100644
--- a/device_info_procfs.c
+++ b/device_info_procfs.c
@@ -23,6 +23,11 @@ static ssize_t nvdebug_reg32_read(struct file *f, char __user *buf, size_t size,
23 return chars_written; 23 return chars_written;
24} 24}
25 25
26struct file_operations nvdebug_read_reg32_file_ops = {
27 .read = nvdebug_reg32_read,
28 .llseek = default_llseek,
29};
30
26static ssize_t nvdebug_reg_range_read(struct file *f, char __user *buf, size_t size, loff_t *off) { 31static ssize_t nvdebug_reg_range_read(struct file *f, char __user *buf, size_t size, loff_t *off) {
27 char out[12]; 32 char out[12];
28 int chars_written; 33 int chars_written;
@@ -49,11 +54,6 @@ static ssize_t nvdebug_reg_range_read(struct file *f, char __user *buf, size_t s
49 return chars_written; 54 return chars_written;
50} 55}
51 56
52struct file_operations nvdebug_read_reg32_file_ops = {
53 .read = nvdebug_reg32_read,
54 .llseek = default_llseek,
55};
56
57// Generic mechanism used for printing a subset of bits from a register 57// Generic mechanism used for printing a subset of bits from a register
58// Please store a `union reg_range` rather than a `uintptr_t` in the pde_data 58// Please store a `union reg_range` rather than a `uintptr_t` in the pde_data
59struct file_operations nvdebug_read_reg_range_file_ops = { 59struct file_operations nvdebug_read_reg_range_file_ops = {
diff --git a/nvdebug.h b/nvdebug.h
index b13d311..755fada 100644
--- a/nvdebug.h
+++ b/nvdebug.h
@@ -126,6 +126,9 @@ struct gm107_runlist_chan {
126 TSGs appear to have been introduced with Kepler and stayed the same until 126 TSGs appear to have been introduced with Kepler and stayed the same until
127 they were rearranged at the time of channel rearrangement to support longer 127 they were rearranged at the time of channel rearrangement to support longer
128 GPU instance addresses with Volta. 128 GPU instance addresses with Volta.
129
130 According to nvgpu, "timeslice is measured with PTIMER [which may be] lower
131 than 1GHz."
129*/ 132*/
130 133
131// Support: Volta, Turing*, Ampere* 134// Support: Volta, Turing*, Ampere*
@@ -527,10 +530,7 @@ typedef union {
527 upon reaching the first entry of INFO_TYPE_NOT_VALID. 530 upon reaching the first entry of INFO_TYPE_NOT_VALID.
528 531
529 The fields for the Ampere version of the GPU are a strict subset of those for 532 The fields for the Ampere version of the GPU are a strict subset of those for
530 the earlier versions. They are in different positions within the struct and 533 the earlier versions.
531 have names ending in _ampere to distinguish them. Other than that, each
532 Ampere device info field is functionally identical to the equivalent field in
533 the previous version.
534 534
535 INFO_TYPE : Is this a DATA, ENUM, or ENGINE_TYPE table entry? 535 INFO_TYPE : Is this a DATA, ENUM, or ENGINE_TYPE table entry?
536 HAS_NEXT_ENTRY : Does the following entry refer to the same engine? 536 HAS_NEXT_ENTRY : Does the following entry refer to the same engine?
@@ -573,7 +573,7 @@ typedef union {
573 == INFO_TYPE_ENGINE_TYPE fields == 573 == INFO_TYPE_ENGINE_TYPE fields ==
574 ENGINE_TYPE : What type of engine is this? (see ENGINE_TYPES_NAMES) 574 ENGINE_TYPE : What type of engine is this? (see ENGINE_TYPES_NAMES)
575 575
576 Support: Kepler, Maxwell, Pascal, Volta, Ampere 576 Support: Kepler, Maxwell, Pascal, Volta, Turing, Ampere
577 See dev_top.ref.txt of NVIDIA's open-gpu-doc for more info. 577 See dev_top.ref.txt of NVIDIA's open-gpu-doc for more info.
578*/ 578*/
579 579
diff --git a/nvdebug_entry.c b/nvdebug_entry.c
index f3dcdbb..24fcd32 100644
--- a/nvdebug_entry.c
+++ b/nvdebug_entry.c
@@ -22,16 +22,19 @@ MODULE_LICENSE("Dual MIT/GPL");
22MODULE_AUTHOR("Joshua Bakita"); 22MODULE_AUTHOR("Joshua Bakita");
23MODULE_DESCRIPTION("A scheduling debugging module for NVIDIA GPUs"); 23MODULE_DESCRIPTION("A scheduling debugging module for NVIDIA GPUs");
24 24
25// runlist_procfs.c
25extern struct file_operations runlist_file_ops; 26extern struct file_operations runlist_file_ops;
26extern struct file_operations preempt_tsg_file_ops; 27extern struct file_operations preempt_tsg_file_ops;
27extern struct file_operations disable_channel_file_ops; 28extern struct file_operations disable_channel_file_ops;
28extern struct file_operations enable_channel_file_ops; 29extern struct file_operations enable_channel_file_ops;
29extern struct file_operations switch_to_tsg_file_ops; 30extern struct file_operations switch_to_tsg_file_ops;
31// device_info_procfs.c
30extern struct file_operations device_info_file_ops; 32extern struct file_operations device_info_file_ops;
31extern struct file_operations copy_topology_file_ops;
32extern struct file_operations nvdebug_read_reg32_file_ops; 33extern struct file_operations nvdebug_read_reg32_file_ops;
33extern struct file_operations nvdebug_read_reg_range_file_ops; 34extern struct file_operations nvdebug_read_reg_range_file_ops;
34extern struct file_operations local_memory_file_ops; 35extern struct file_operations local_memory_file_ops;
36// copy_topology_procfs.c
37extern struct file_operations copy_topology_file_ops;
35 38
36struct nvdebug_state g_nvdebug_state[NVDEBUG_MAX_DEVICES]; 39struct nvdebug_state g_nvdebug_state[NVDEBUG_MAX_DEVICES];
37unsigned int g_nvdebug_devices = 0; 40unsigned int g_nvdebug_devices = 0;
@@ -194,7 +197,7 @@ int create_tpc_mask_files(int device_id, struct proc_dir_entry *dir) {
194 int i; 197 int i;
195 struct proc_dir_entry *gpc_tpc_mask_entry; 198 struct proc_dir_entry *gpc_tpc_mask_entry;
196 // Get maximum number of enabled GPCs for this chip 199 // Get maximum number of enabled GPCs for this chip
197 uint32_t max_gpcs = nvdebug_readl(&g_nvdebug_state[device_id], NV_PTOP_SCAL_NUM_GPCS); 200 uint32_t max_gpcs = nvdebug_readl(g, NV_PTOP_SCAL_NUM_GPCS);
198 // Get a bitmask of which GPCs are disabled 201 // Get a bitmask of which GPCs are disabled
199 uint32_t gpcs_mask; 202 uint32_t gpcs_mask;
200 if (g->chip_id < NV_CHIP_ID_AMPERE) 203 if (g->chip_id < NV_CHIP_ID_AMPERE)